Display device

US9711088B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9711088-B2
Application numberUS-201514817668-A
CountryUS
Kind codeB2
Filing dateAug 4, 2015
Priority dateAug 5, 2014
Publication dateJul 18, 2017
Grant dateJul 18, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes a display panel and a scan driver including transistors formed in a non-display area of the display panel. A compensation voltage is supplied to the scan driver through a compensation gate electrode included in at least one transistor of the scan driver. Namely, the at least one transistor includes a gate electrode, to which a signal or a voltage for activating a channel is supplied, and the compensation gate electrode, to which the compensation voltage for recovering a threshold voltage is supplied.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a display panel; and a scan driver for supplying a scan signal to the display panel including transistors formed in a non-display area of the display panel, wherein at least one of the transistors includes a gate electrode and a compensation gate electrode positioned corresponding to a semiconductor layer, and the semiconductor layer is interposed between the gate electrode and the compensation gate electrode, wherein the gate electrode is supplied by a voltage for activating a channel in the semiconductor layer; and the compensation gate electrode is supplied by a compensation voltage for recovering a threshold voltage of the transistor. 2. The display device of claim 1 , wherein the voltage supplied to the gate electrode is different from the compensation voltage supplied to compensation gate electrode. 3. The display device of claim 1 , wherein the transistor having the compensation gate electrode is connected to a low potential power line supplying a low potential power to the scan driver. 4. The display device of claim 3 , wherein the compensation gate electrode is connected to a compensation line, to which the compensation voltage is transmitted. 5. The display device of claim 3 , wherein the compensation gate electrode is connected to an additional potential power line transmitting a potential power lower than the low potential power. 6. The display device of claim 1 , wherein the compensation voltage varies depending on at least one of a temperature, a bias voltage, and a driving time applied to the transistor having the compensation gate electrode. 7. The display device of claim 1 , wherein the compensation voltage is a negative voltage. 8. The display device of claim 1 , wherein the compensation voltage causes the threshold voltage of the transistor to be shifted in a positive direction or a negative direction. 9. The display device of claim 1 , further comprising: a temperature sensor configured to sense changes in a temperature of the scan driver; a driving time sensor configured to sense changes in the driving time of the scan driver; and a compensation voltage output unit configured to optimally output the compensation voltage based on one or two of the sensing results transmitted from the temperature sensor and the driving time sensor. 10. The display device of claim 9 , wherein the temperature sensor, the driving time sensor, and the compensation voltage output unit are integrated into one of an image supply unit, a timing controller, or a level shifter in the scan driver, or are implemented as a separate integrated circuit. 11. The display device of claim 9 , wherein the compensation voltage output unit outputs the compensation voltage during a blank period, in which an image is not displayed. 12. The display device of claim 9 , wherein the compensation voltage output unit outputs the compensation voltage through a compensation line connected to the compensation gate electrode. 13. The display device of claim 1 , wherein the scan driver includes a plurality of stages, where a preceding stage is connected with a subsequent stage, and wherein each stage includes at least a shift register and a inverter. 14. The display device of claim 13 , the compensation voltage is supplied to both the shift register and the inverter. 15. The display device of claim 1 , wherein the scan driver includes a plurality of stages, where a preceding stage is connected with a subsequent stage and each state includes at least a shift register, and wherein the shift register in the preceding state outputs the scan signal and a carry signal controlling a subsequent stage. 16. The display device of claim 15 , wherein the transistor having the compensation gate electrode is connected to a low potential power line supplying a low potential power to the scan driver, wherein the compensation gate electrode is connected to an additional potential power line transmitting a potential power lower than the low potential power, and wherein the voltage supplied by the additional potential power line is outputted as the carry signal.

Assignees

Inventors

Classifications

  • G09G3/3266Primary

    Details of drivers for scan electrodes · CPC title

  • Details of a shift registers arranged for use in a driving circuit · CPC title

  • suitable for active matrices only · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

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Frequently asked questions

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What does patent US9711088B2 cover?
A display device includes a display panel and a scan driver including transistors formed in a non-display area of the display panel. A compensation voltage is supplied to the scan driver through a compensation gate electrode included in at least one transistor of the scan driver. Namely, the at least one transistor includes a gate electrode, to which a signal or a voltage for activating a chann…
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3266. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).