Wireless receiver and method

Patent metadata

Field	Value
Publication number	US-9705544-B2
Application number	US-201615135653-A
Country	US
Kind code	B2
Filing date	Apr 22, 2016
Priority date	Apr 23, 2015
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

A receiver and method for a wireless signal transmission system use digital amplitude modulation of a base band signal having a symbol clock frequency. The receiver includes a reference generator which generates a local reference frequency, a mixer to extract the base band signal, a high pass filter to suppress a DC component, an amplifier, an analog-to-digital converter and a digital signal processor to receive digital signals and extract symbols. A base band signal rotation detection circuit detects rotation of the base band signal upstream of the high pass filter. The digital signal processor determines a symbol clock phase by generating a coarse estimate of the symbol clock phase and correcting the coarse estimate based on detected rotations of the base band signal. A determination that the symbol clock phase corresponds to a complete rotation is used in relation to the extraction of symbols.

First claim

The invention claimed is:

1. A receiver for a wireless signal transmission system using digital amplitude modulation using a base band signal having a symbol clock frequency, the receiver comprising:
an input for connection to an antenna for receiving a wireless signal;
a reference generator for generating a local reference frequency signal;
a mixer arranged to mix the local reference frequency signal with a received signal to extract the base band signal;
a high pass filter arranged to receive the output of the mixer and to suppress a DC component of the extracted base band signal;
an amplifier arranged downstream of the high pass filter;
an analogue-to-digital converter arranged to convert the output of the amplifier into a digital signal;
a digital signal processor arranged to receive the digital signal from the analogue-to-digital converter and configured to extract symbols from the digital signal; and
a base band signal rotation detection circuit arranged to detect rotation of the base band signal upstream of the high pass filter and having an output in communication with the digital signal processor,
wherein the digital signal processor is further configured to determine a symbol clock phase by generating a coarse estimate of the symbol clock phase using the local reference frequency signal, or a reference frequency signal derived from the local reference frequency signal, and correcting the coarse estimate of the symbol clock phase based on rotations of the base band signal detected by the base band signal rotation detection circuit, and to use a determination that the symbol clock phase corresponds to a complete rotation to extract symbols from the digital signal.

2. The receiver as claimed in claim 1 , wherein the reference generator is a local oscillator and can generate an in phase signal and a quadrature signal and wherein the in phase signal and quadrature signal are supplied to the mixer to extract an in phase base band signal and a quadrature base band signal.

3. The receiver as claimed in claim 2 , wherein the base band rotation detection circuit includes a base band signal in phase component detector and a base band signal quadrature component detector, and wherein the in phase base band signal is supplied to the base band signal in phase component detector and the quadrature base band signal is supplied to the base band signal quadrature component detector.

4. The receiver as claimed in claim 3 , wherein the base band rotation detection circuit includes a base band signal in phase component sampler and a base band signal quadrature component sampler, and wherein the base band signal in phase component sampler and the base band signal quadrature component sampler are each clocked by the local reference frequency signal, or a reference frequency signal derived from the local reference frequency signal.

5. The receiver as claimed in claim 3 , wherein the base band signal in phase component detector is a first comparator and the base band signal quadrature component detector is a second comparator, and wherein the first comparator is arranged to receive the in phase base band signal as an input and the second comparator is arranged to receive the quadrature base band signal as an input.

6. The receiver as claimed in claim 3 , wherein the base band rotation detection circuit includes a received signal in phase component sampler and a received signal quadrature component sampler, and wherein the received signal in phase component sampler is clocked by the in phase signal output by the local oscillator and the received signal quadrature component sampler is clocked by the quadrature signal output by the local oscillator.

7. The receiver as claimed in claim 1 , and further comprising a divider component arranged to reduce the frequency of the local reference frequency by a factor N and to supply a digital signal processor clock signal to the digital signal processor.

8. The receiver as claimed in claim 1 , wherein the digital signal processor is configured to use a hysteretic method to correct the coarse estimate of the symbol clock phase.

9. The receiver as claimed in claim 8 , wherein the digital signal processor is configured to correct the coarse estimate of the symbol clock phase only if detection of a completed rotation of the base band signal is followed by detection of rotation of the base band signal into a successive quadrant of the imaginary plane of the in phase and quadrature components of the base band signal.

10. The receiver as claimed in claim 1 , wherein the digital signal processor is configured to increment the coarse estimate of the symbol clock phase once every cycle of the local reference frequency signal, or a reference frequency signal derived from the local reference frequency signal.

11. The receiver as claimed in claim 10 , wherein the digital signal processor is configured to increment the coarse estimate of the symbol clock phase by 2×π×N/M, where N is an integer divisor of the local reference frequency used to produce the derived reference frequency and M is an integer divisor of the carrier frequency corresponding to the symbol clock frequency.

12. The receiver as claimed in claim 1 , wherein the digital signal processor is configured to correct the coarse estimate of the symbol phase by 2×π/M when a completed rotation of the base band signal has been detected, wherein M is an integer divisor of the carrier frequency corresponding to the symbol clock frequency.

13. The receiver as claimed in claim 1 , wherein the digital signal processor is configured to alter the symbol clock phase by 2π when the base band signal rotation detection circuit determines that the magnitude of the symbol clock phase is equal to, or greater than, 2π.

14. A package comprising a lead frame and a semiconductor integrated circuit, wherein the semiconductor integrated circuit comprises the receiver of claim 1 .

15. A method at a receiver for decoding data encoded using a base band signal having a symbol clock frequency and digital amplitude modulation of a carrier wave, the method comprising:
receiving a wireless signal at a receiver;
using a local reference frequency signal generated at the receiver to extract the base band signal from the received wireless signal;
high pass filtering the extracted base band signal;
amplifying the extracted base band signal;
converting the amplified extracted base band signal to a digital base band signal;
detecting rotation of the base band signal upstream of the high pass filter;
generating a coarse estimate of a symbol clock phase using the local reference frequency signal, or a reference frequency signal derived from the local reference frequency signal;
correcting the coarse estimate of the symbol clock phase to a corrected symbol clock phase based on detected rotations of the base band signal; and
using a determination that the corrected symbol clock phase corresponds to a complete rotation to extract symbols from the digital base band signal.

Assignees

• Nxp Bv

Inventors

• Van De Beek Remco
• Verlinden Jos

Classifications

• H04L27/066

  Carrier recovery circuits (H04L27/2271 takes precedence) · CPC title

• H04B1/40 Primary

  Circuits · CPC title

• H04L27/06

  Demodulator circuits; Receiver circuits · CPC title

• H04B1/12 Primary

  Neutralising, balancing, or compensation arrangements · CPC title