Pulsed feedback switching converter

US9705412B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9705412-B2
Application numberUS-201514632774-A
CountryUS
Kind codeB2
Filing dateFeb 26, 2015
Priority dateFeb 26, 2015
Publication dateJul 11, 2017
Grant dateJul 11, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure is directed to a switching power converter having a regulated output voltage or output current. The power converter uses a control unit having a signal conditioning circuit to produce a control voltage signal, which is used to drive a power stage of the converter. The signal conditioning circuit includes a comparator that compares a measured electrical quantity to a reference value representative of a desired regulated output quantity, and produces a digital detection signal based on the comparison. A control actuator uses the digital detection signal to produce a correction signal, which is received by an averaging circuit. The averaging circuit then produces the control voltage signal based on an average of the correction signal.

First claim

Opening claim text (preview).

The invention claimed is: 1. A device comprising: a comparator configured to receive a reference signal and a measured value signal representative of an output electrical quantity of a power stage of a switching converter, the comparator being configured to produce a digital detection signal based on a comparison of the measured value signal and the reference signal; a control actuator configured to produce correction signal pulses by correcting the digital detection signal; an averaging circuit configured to produce a control signal by averaging the correction signal pulses; and a power stage driver configured to drive the power stage of the switching converter based on the control signal to regulate the output electrical quantity. 2. The device of claim 1 , wherein the control actuator includes a monostable oscillator configured to produce the correction signal pulses. 3. The device of claim 2 , wherein the control actuator further includes a counter coupled to the monostable oscillator and configured to reduce a frequency of the correction signal pulses. 4. The device of claim 2 , wherein the control actuator further includes a logic gate configured to receive the digital detection signal and a clock signal, and to produce a logic pulse signal that is supplied to clock the monostable oscillator. 5. The device of claim 1 , wherein the control actuator further includes: a clock configured to produce a clock signal; a set-reset flip-flop having a set input configured to receive the digital detection signal and a reset input configured to receive the clock signal. 6. The device of claim 5 , wherein the control actuator further includes a counter configured to reduce a frequency of the correction signal pulses. 7. The device of claim 5 , wherein the control actuator further includes: a time delay circuit coupled between the clock and the reset input of the flip-flop and configured to delay the clock signal; a logic gate configured to receive the clock signal and an output of the flip-flop, and to produce a logic signal to a monostable oscillator, the monostable oscillator being configured to produce the correction signal based on the logic signal. 8. The device of claim 1 , wherein the control actuator includes: an oscillator configured to produce the correction signal pulses based on the digital detection signal. 9. The device of claim 1 , wherein the measured value signal is representative of an output voltage of the switching converter. 10. The device of claim 1 , wherein the averaging circuit further comprises: a first resistor coupled to a reference voltage terminal; a second resistor coupled to the first resistor; and a capacitor coupled to the first resistor and configured to discharge based on the correction signal. 11. A method, comprising: comparing a measured value signal representative of a an output electrical quantity of a power stage of a switching converter to a reference value; producing a digital detection signal based on the comparison of the measured value signal and the reference value; performing a corrective action at a control actuator when the measured value signal has a value greater than the reference value, performing the corrective action including: receiving the digital detection signal at an input of the control actuator; producing a sequence of correction signal pulses by correcting the digital detection signal; averaging the sequence of correction signal pulses to produce a control voltage signal; and driving the power stage of the switching convert based on the control voltage signal to regulate the output voltage. 12. The method of claim 11 , performing the corrective action further including: receiving the digital detection signal and a clock signal at a logic gate; receiving an output signal of the logic gate at a monostable oscillator; producing the sequence of correction signal pulses from the monostable oscillator based on the output signal of the logic gate. 13. The method of claim 11 , performing the corrective action further including: receiving the digital detection signal at a set input of a set-reset flip-flop; receiving a clock signal at a reset input of the set-reset flip-flop; producing the sequence of correction signal pulses from the set-reset flip-flop based on the digital detection signal and the clock signal. 14. The method of claim 11 , performing the corrective action further including: receiving the digital detection signal at a monostable oscillator; producing the sequence of correction signal pulses from the monostable oscillator. 15. The method of claim 11 , performing the corrective action further including: receiving the digital detection signal at a set input of a set-reset flip-flop; producing a clock signal; delaying the clock signal; receiving the delayed clock signal at a reset input of the set-reset flip-flop; producing an output signal from the set-reset flip-flop; receiving the clock signal and the output signal of the set-reset flip-flop at a logic gate; receiving an output signal of the logic gate at a monostable oscillator; producing the sequence of correction signal pulses from the monostable oscillator based on the output signal of the logic gate. 16. A switching converter, comprising: a power stage, including: a transformer coupled to an input voltage and configured to produce an output electrical quantity; a first switch coupled to the transformer; a sensing circuit configured to produce a measured value signal representative of the output voltage of the transformer; a signal conditioning circuit, including: a comparator configured to receive a reference signal and the measured value signal, and to produce a digital detection signal based on a comparison of the measured value signal and the reference signal; a control actuator configured to produce a series of correction signal pulses by correcting the digital detection signal; an averaging circuit configured to produce a control voltage signal by averaging the series of correction signal pulses over time; a modulator coupled to the signal conditioning circuit and configured to produce a pulsed signal based on the control voltage signal; and a driver coupled to the modulator and configured to provide a driving signal to the first switch of the power stage based on the pulsed signal to regulate the output voltage of the transformer. 17. The switching converter of claim 16 , wherein the control actuator includes an oscillator configured to produce the series of correction signal pulses. 18. The switching converter of claim 17 , wherein the control actuator further includes a logic gate configured to receive the digital detection signal and a clock signal, and to provide a logic signal to the oscillator. 19. The switching converter of claim 16 , wherein the control actuator includes: a clock configured to produce a clock signal; and a set-reset flip-flop having a set input configured to receive the digital detection signal and a reset input configured to receive the clock signal, the flip-flop being configured to produce the series of correction signal pulses. 20. The switching converter of claim 16 , wherein the power stage further comprises a second switch coupled to the transformer.

Assignees

Inventors

Classifications

  • having several active switching elements (H02M3/3353 takes precedence) · CPC title

  • G05F1/56Primary

    using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

  • Half-bridge at primary side of an isolation transformer · CPC title

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Frequently asked questions

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What does patent US9705412B2 cover?
The present disclosure is directed to a switching power converter having a regulated output voltage or output current. The power converter uses a control unit having a signal conditioning circuit to produce a control voltage signal, which is used to drive a power stage of the converter. The signal conditioning circuit includes a comparator that compares a measured electrical quantity to a refer…
Who is the assignee on this patent?
St Microelectronics Srl
What technology area does this patent fall under?
Primary CPC classification H02M3/33569. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 11 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).