Method for identifying arcing faults and circuit breaker

US9705304B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9705304-B2
Application numberUS-201313974416-A
CountryUS
Kind codeB2
Filing dateAug 23, 2013
Priority dateFeb 23, 2011
Publication dateJul 11, 2017
Grant dateJul 11, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for identifying arcing faults within a circuit having a system frequency, an electrical current and an electrical voltage, in which method an interference signal occurring, which has a frequency below an LF1 frequency and a current intensity above an LF1 limit threshold, defines an LF1 signal, in which a number of interference signals occurring, which have a frequency below an HF2 frequency, are combined to form an HF2 signal if the number of interference signals occurring is greater than or equal to an HF2 number and the time interval between two successive interference signals is less than an HF2 time, in which the number of time periods with a respective length which amounts to an accumulation length and which follow one another directly in time and in which in each case at least one HF2 signal is present define an accumulation when the number of time periods is greater than or equal to an accumulation number.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for identifying arcing faults within an electrical circuit comprising a system frequency, an electrical current, and an electrical voltage, the method comprising: detecting, by a processor, an interference signal; classifying, by the processor, each of the detected interference signal as a first signal if the interference signal occurring has a frequency below a first frequency and if a current intensity of the electrical current of the electrical circuit is above a current limit threshold, and as a second signal if the interference signal has a frequency below a second frequency; combining, by the processor, a number of second signals to form an HF2 signal if the number of the second signals occurring is greater than or equal to a predetermined minimum number for combination and if a time interval between two successive second signals is less than an HF2 time; determining, by the processor, whether at least one HF2 signal is present in a predetermined time period that amounts to an accumulation length; defining, by the processor, time periods as an accumulation if a number of succeeding predetermined time periods is greater than or equal to an accumulation number; incrementing, by the processor, a WET1 accumulation counter by one if an accumulation is identified; resetting, by the processor, the WET1 accumulation counter to zero if the time interval between two neighboring accumulations is less than a first accumulation time or greater than a second accumulation time; starting, by the processor, a waiting period after an accumulation value has been reached for the WET1 accumulation counter; terminating, by the processor, the waiting period and resetting the WET1 accumulation counter to zero if at least one first signal or two accumulations between which the time interval is less than a third accumulation time are measured within the waiting period; and identifying and/or reporting, by the processor, an arcing fault after the waiting period has elapsed, wherein the waiting period is terminated if this has already begun and the WET1 accumulation counter is reset to zero and left at zero for a parallel time period if a third signal is measured which has a duration longer than an LF2 limit length, wherein an interference signal occurring which has a frequency below a third frequency and a current intensity of the electrical current of the electrical circuit above an LF2 limit threshold is designated as the third signal, and wherein the parallel time period is ended if a measured third signal has a duration shorter than the LF2 limit length or the voltage for a first termination time span was less than a termination voltage or if no third signal was measured for a second termination time span, and wherein the arcing fault is detected and/or reported: if within the parallel time period between all successive second signals, the time interval is greater than or equal to a first arcing fault time span; if within the parallel time period between two directly successive second signals, the time interval is greater than or equal to a second arcing fault time span; or if either a number of second signals was measured which is greater than or equal to a first arcing fault number if, within a third arcing fault time span, a number of third signals was measured which lies between a second arcing fault number and a third arcing fault number, or if a number of second signals was measured which is greater than or equal to a fourth arcing fault number if, within the third arcing fault time span, a number of third signals was measured which is greater than the third arcing fault number, wherein the third arcing fault time span in each case begins with the parallel time period. 2. A circuit breaker which is provided and designed for carrying out the method as claimed in claim 1 . 3. The circuit breaker as claimed in claim 2 , comprising an interruption unit for interrupting an electrical circuit as soon as the arcing fault is identified and/or reported.

Assignees

Inventors

Classifications

  • of cable, line or wire insulation, e.g. using partial discharge measurements (locating faults in cables G01R31/083) · CPC title

  • Details of emergency protective circuit arrangements · CPC title

  • H02H1/0015Primary

    Using arc detectors · CPC title

  • with automatic disconnection after a predetermined time (H02H3/033, H02H3/06 take precedence {; timing in overcurrent protection circuits H02H3/093; in undervoltage protection circuits H02H3/247; staggered disconnection H02H7/30}) · CPC title

  • Physics · mapped topic

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What does patent US9705304B2 cover?
A method for identifying arcing faults within a circuit having a system frequency, an electrical current and an electrical voltage, in which method an interference signal occurring, which has a frequency below an LF1 frequency and a current intensity above an LF1 limit threshold, defines an LF1 signal, in which a number of interference signals occurring, which have a frequency below an HF2 freq…
Who is the assignee on this patent?
Ellenberger & Poensgen
What technology area does this patent fall under?
Primary CPC classification G01R31/1272. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 11 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).