Magnetoresistive element and manufacturing method of the same

Patent metadata

Field	Value
Publication number	US-9705076-B2
Application number	US-201414478971-A
Country	US
Kind code	B2
Filing date	Sep 5, 2014
Priority date	Mar 13, 2014
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

According to one embodiment, there is provided a magnetoresistive element, including a lower electrode having crystallinity on a substrate, a first conductive layer including an amorphous state on the lower electrode, a buffer layer on the first conductive layer, and an MTJ element on the buffer layer.

First claim

What is claimed is:

1. A magnetoresistive element, comprising:
a lower electrode having crystallinity on a substrate;
a first conductive layer including an amorphous state on the lower electrode;
a buffer layer on the first conductive layer; and
an MTJ element on the buffer layer.

2. The magnetoresistive element of claim 1 , wherein the MTJ element is a layered structure in which a nonmagnetic layer is sandwiched between magnetic layers.

3. The magnetoresistive element of claim 1 , wherein a material of the lower electrode is same as a material of the first conductive layer.

4. The magnetoresistive element of claim 1 , further comprising a second conductive layer including an amorphous state, a material of the second conductive layer being different from a material of the lower electrode and the second conductive layer being inserted between the lower electrode and the first conductive layer.

5. The magnetoresistive element of claim 4 , wherein the second conductive layer is a boride or a nitride of a metal.

6. The magnetoresistive element of claim 1 , wherein each of the lower electrode and the first conductive layer includes at least one of Ta, W, TiN and Cu.

7. The magnetoresistive element of claim 1 , wherein the buffer layer includes at least one of Hf, Ta, Zn, Cr, Nb, V, Mn, Zr, Pa, Hf, Ti, Al, Be, Sc, Nd, Gd, Tb, Lu and Dy.

8. The magnetoresistive element of claim 1 , further comprising an interlayer insulation film on the substrate,
wherein the lower electrode, the first conductive layer and the buffer layer are in a contact hole in the interlayer insulation film.

9. A nonvolatile semiconductor memory, comprising:
a transistor provided on a surface portion of a semiconductor substrate;
an interlayer insulation film on the semiconductor substrate, the interlayer insulation film comprising a contact hole connected to one of a source and a drain of the transistor;
a lower electrode having crystallinity, in the contact hole of the interlayer insulation film, the lower electrode being connected to one of the source and the drain of the transistor;
a first conductive layer including an amorphous state on the lower electrode;
a buffer layer on the first conductive layer; and
an MTJ element on the buffer layer.

10. The memory of claim 9 , wherein a material of the lower electrode is same as a material of the first conductive layer.

11. The memory of claim 9 , further comprising a second conductive layer including an amorphous state, a material of the second conductive layer being different from the material of the lower electrode and the second conductive layer being inserted between the lower electrode and the first conductive layer.

12. The memory of claim 11 , wherein the second conductive layer is a boride or a nitride of a metal.

13. The memory of claim 9 , wherein each of the lower electrode and the first conductive layer includes at least one of Ta, W, TiN and Cu.

14. The memory of claim 9 , wherein the buffer layer includes at least one of Hf, Ta, Zn, Cr, Nb, V, Mn, Zr, Pa, Hf, Ti, Al, Be, Sc, Nd, Gd, Tb, Lu and Dy.

15. The memory of claim 9 , wherein the first conductive layer and the buffer layer are in the contact hole.

16. The magnetoresistive element of claim 1 , wherein the buffer layer has crystallinity.

17. The magnetoresistive element of claim 9 , wherein the buffer layer has crystallinity.

Assignees

• Nagamine Makoto
• Eeh Youngmin
• Ueda Koji
• Watanabe Daisuke
• Sawada Kazuya
• Nagase Toshihiko
• Nakayama Masahiko
• Toshiba Kk

Inventors

• Nagamine Makoto
• Eeh Youngmin
• Ueda Koji
• Watanabe Daisuke
• Sawada Kazuya
• Nagase Toshihiko
• Nakayama Masahiko

Classifications

• H01L43/08

  Electricity · mapped topic

• H01L43/12

  Electricity · mapped topic

• H01L27/228

  Electricity · mapped topic

• H01L43/10 Primary

  Electricity · mapped topic

• H10B61/22

  of the field-effect transistor [FET] type · CPC title