Semiconductor device and a method for forming a semiconductor device

Patent metadata

Field	Value
Publication number	US-9704954-B2
Application number	US-201615041671-A
Country	US
Kind code	B2
Filing date	Feb 11, 2016
Priority date	Feb 13, 2015
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

A semiconductor device comprises at least one strip-shaped cell compensation region of a vertical electrical element arrangement, at least one strip-shaped edge compensation region and a bridge structure. The at least one strip-shaped cell compensation regions extends into a semiconductor substrate and comprises a first conductivity type. Further, the at least one strip-shaped cell compensation region is connected to a first electrode structure of the vertical electrical element arrangement. The at least one strip-shaped edge compensation region extends into the semiconductor substrate within an edge termination region of the semiconductor device and outside the cell region. Further, the at least one strip-shaped edge compensation region comprises the first conductivity type. The bridge structure electrically connects the at least one strip-shaped edge compensation region with the at least one strip-shaped cell compensation region within the edge termination region.

First claim

What is claimed is:

1. A semiconductor device comprising:
a strip-shaped cell compensation region of a vertical electrical element arrangement, wherein the at least one strip-shaped cell compensation regions extends into a semiconductor substrate and comprises a first conductivity type,
wherein the at least one strip-shaped cell compensation region is connected to a first electrode structure of the vertical electrical element arrangement;
at least one strip-shaped edge compensation region extending into the semiconductor substrate within an edge termination region of the semiconductor device outside the cell region, wherein the at least one strip-shaped edge compensation region comprises the first conductivity type; and
a bridge structure electrically connecting the at least one strip-shaped edge compensation region with the at least one strip-shaped cell compensation region within the edge termination region;
wherein the bridge structure comprises a highly-doped doping region of the first conductivity type electrically connecting the at least one strip-shaped edge compensation region with the at least one strip-shaped cell compensation region, wherein a doping concentration of the highly-doped doping region is larger than a doping concentration of the at least one strip-shaped cell compensation region.

2. The semiconductor device according to claim 1 , wherein a doping concentration of the highly-doped doping region of the bridge structure is larger than 1* 10 17 cm −3 .

3. The semiconductor device according to claim 1 , wherein the bridge structure comprises a conductive material structure above the semiconductor substrate being in contact with the at least one strip-shaped edge compensation region and the at least one strip-shaped cell compensation region within the edge termination region.

4. The semiconductor device according to claim 1 , comprising a second electrode structure arranged within the edge termination region, wherein the bridge structure is located below a field plate of the second electrode structure or is located closer to an edge of the field plate of the second electrode structure than to an edge of the cell region, wherein the second electrode structure is electrically connected to a back side electrode structure.

5. The semiconductor device according to claim 4 , wherein the bridge structure extends substantially in parallel to an edge of the second electrode plate of the second electrode structure.

6. The semiconductor device according to claim 1 , wherein the at least one strip-shaped cell compensation region connected to the bridge structure comprises a first part being located in the cell region and being in contact with the first electrode structure and a second part being located in the edge termination region and being in contact with the bridge structure.

7. The semiconductor device according to claim 1 , wherein the bridge structure is connected to the at least one strip-shaped cell compensation region at an end portion of the at least one strip-shaped cell compensation region, wherein the end portion of the at least one strip-shaped cell compensation region is represented by the last 10% of length of the at least one strip-shaped cell compensation region.

8. The semiconductor device according to claim 1 , wherein a distance between the first electrode structure and a contact area between the bridge structure and the at least one strip-shaped cell compensation region is larger than 50 μm.

9. The semiconductor device according to claim 1 , wherein the bridge structure is configured to electrically connect the at least one strip-shaped edge compensation region with the at least one strip-shaped cell compensation region so that a number of free charge carriers within the at least one strip-shaped edge compensation region is reduced by a current through the bridge structure and the at least one strip-shaped cell compensation region to the first electrode structure during switching the vertical electrical element arrangement from an on-state to an off-state.

10. The semiconductor device according to claim 1 , comprising a plurality of strip-shaped cell compensation regions, wherein the plurality of strip-shaped cell compensation regions and a plurality of strip-shaped edge compensation regions are arranged substantially in parallel to an edge of the semiconductor substrate, wherein a bridge structure electrically connecting at least one strip-shaped edge compensation region of the plurality of strip-shaped edge compensation regions with at least one strip-shaped cell compensation region of the plurality of strip-shaped cell compensation regions is arranged within the edge termination region at each corner of the semiconductor substrate.

11. The semiconductor device according to claim 1 , comprising a plurality of strip-shaped cell compensation regions, wherein the plurality of strip-shaped cell compensation regions and a plurality of strip-shaped edge compensation regions are arranged substantially in parallel to a common strip direction, wherein an angle between the common strip direction and an edge of the semiconductor substrate is between 20° and 70°, wherein a bridge structure electrically connecting at least one strip-shaped edge compensation region of the plurality of strip-shaped edge compensation regions with at least one strip-shaped cell compensation region of the plurality of strip-shaped cell compensation regions is arranged within two edge termination regions at opposite corners of the semiconductor substrate.

12. The semiconductor device according to claim 1 , comprising a plurality of strip-shaped cell compensation regions, wherein a strip-shaped cell compensation region of the plurality of strip-shaped cell compensation regions comprises a laterally summed number of dopants per unit area of the first conductivity type deviating from half of a laterally summed number of dopants per unit area of the second conductivity type comprised by two strip-shaped drift regions located adjacent to opposite sides of the strip-shaped cell compensation region by less than +/−25% of the laterally summed number of dopants per unit area of the first conductivity type comprised by the strip-shaped cell compensation region.

13. The semiconductor device according to claim 1 , comprising a plurality of strip-shaped cell compensation regions, wherein the plurality of strip-shaped cell compensation regions extend from a front side surface of the semiconductor substrate into a depth of more than 10 μm.

14. The semiconductor device according to claim 1 , wherein the vertical electrical element arrangement is a field effect transistor arrangement and the first electrode structure is a source electrode structure of the field effect transistor arrangement.

15. The semiconductor device according to claim 1 , comprising a plurality of strip-shaped drift regions of the vertical electrical element arrangement extending into the semiconductor substrate within the cell region of the semiconductor device, wherein the plurality of strip-shaped drift regions comprise a second conductivity type, wherein the plurality of strip-shaped drift regions and a plurality of strip-shaped cell compensation regions are arranged alternatingly.

16. The semiconductor device according to claim 1 , wherein the edge termination region laterally surrounds the cell region.

17. The semiconductor device according to claim 1 , wherein the first electrode structure is in contact with the semiconductor substrate within a cell region of the semiconductor device only.

18. A semiconductor device

Assignees

• Infineon Technologies Austria Ag

Inventors

• Tutuc Daniel
• Hirler Franz
• Voerckel Andreas
• Weber Hans

Classifications

• H01L29/0696 Primary

  Electricity · mapped topic

• H01L29/402

  Electricity · mapped topic

• H01L29/1095

  Electricity · mapped topic

• H01L29/7823

  Electricity · mapped topic

• H01L29/7393

  Electricity · mapped topic