DC-to-DC converter and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-9704854-B2
Application number	US-201414333329-A
Country	US
Kind code	B2
Filing date	Jul 16, 2014
Priority date	Feb 11, 2014
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

A DC-to-DC converter includes: a substrate having a switching element region defined by an isolation layer; a transistor formed over the switching element region; a landing plate formed over the isolation layer; a capacitor formed over the landing plate and includes a bottom plate, a dielectric layer and a top plate; multi-layer metal lines disposed in an upper portion of the transistor and coupled with the transistor; and an interconnection portion coupled with the multi-layer metal lines to electrically connect the transistor with the capacitor.

First claim

What is claimed is:

1. A direct current-to-direct current (DC-to-DC) converter, comprising:
a substrate having a switching element region and a capacitor region defined by an isolation layer;
a transistor formed over the switching element region;
a landing plate formed over the isolation layer;
a capacitor formed over the landing plate, wherein the capacitor includes a bottom plate, a dielectric layer and a top plate;
multi-layer metal lines disposed in an upper portion of the transistor and coupled with the transistor; and
an interconnection portion coupled with the multi-layer metal lines to electrically connect the transistor with the capacitor,
wherein the bottom plate has a form of continuum and extended to a boundary line between the switching element region and the capacitor region,
wherein the multi-layer metal lines are contacted with the top plate,
wherein the dielectric layer of the capacitor is extended to overlap with an upper portion of the multi-layer metal lines.

2. The DC-to-DC converter of claim 1 , wherein the bottom plate has a successive cylindrical shape coupled to the landing plate, the dielectric layer is formed over the bottom plate, and the top plate is formed over the dielectric layer.

3. The DC-to-DC converter of claim 1 , wherein the landing plate is disposed at the same surface level as a gate electrode of the transistor.

4. The DC-to-DC converter of claim 3 , wherein the landing plate is formed of the same material as the gate electrode of the transistor.

5. The DC-to-DC converter of claim 1 , wherein the landing plate is disposed at the same surface level as the lowermost metal line of the multi-layer metal lines.

6. The DC-to-DC converter of claim 5 , wherein the landing plate is formed of the same material as the lowermost metal line of the multi-layer metal lines.

7. The DC-to-DC converter of claim 1 , wherein the interconnection portion includes:
a first interconnection portion, which couples the landing plate with the transistor; and
a second interconnection portion, which couples the uppermost metal line of the multi-layer metal lines with the top plate of the capacitor.

8. The DC-to-DC converter of claim 7 , wherein the second interconnection portion includes:
a barrier metal formed over the uppermost metal line;
a first via plug formed over the barrier metal;
a second via plug formed over the capacitor; and
interconnection lines formed over the first and second via plugs,
wherein the barrier metal is continuously extended to the uppermost metal line from the top plate of the capacitor.

9. A direct current-to-direct current (DC-to-DC) converter, comprising:
a substrate having a switching element region and a capacitor region defined by an isolation layer;
a transistor formed over the switching element region;
a landing plate formed over the isolation layer and electrically coupled to the transistor; and
a successive cylindrical capacitor including a bottom plate, a dielectric layer and a top plate formed over the landing plate, wherein the landing plate is electrically coupled with the transistor and successive cylindrical capacitor,
wherein the bottom plate has a form of continuum and extended to a boundary line between the switching element region and the capacitor region,
wherein multi-layer metal lines are contacted with the top plate,
wherein the dielectric layer of the capacitor is extended to overlap with an upper portion of the multi-layer metal lines.

10. The DC-to-DC converter of claim 9 , wherein the successive cylindrical capacitor includes a bottom plate coupled to landing plate, a dielectric layer, and a top plate electrically coupled to the transistor.

11. The DC-to-DC converter of claim 10 ,
wherein the multi-layer metal lines disposed in an upper portion of the transistor and coupled to the transistor; and
an interconnection portion coupled to the multi-layer metal lines to electrically connect the transistor with the successive cylindrical capacitor.

12. The DC-to-DC converter of claim 1 , further comprising:
an inter-layer insulation layer having trenches and formed over the landing plate,
wherein the bottom plate included in the capacitor is formed along an upper surface, sidewalls and a bottom surface of the inter-layer insulation layer having the trenches.

13. The DC-to-DC converter of claim 9 , further comprising:
an inter-layer insulation layer having trenches and formed over the landing plate,
wherein the bottom plate included in the successive cylindrical capacitor is formed along an upper surface, sidewalls and a bottom surface of the inter-layer insulation layer having the trenches.

Assignees

• Sk Hynix Inc

Inventors

• Kim Heon-Joon
• Hwang Jae-Ho

Classifications

• H10W20/496 Primary

  Capacitor integral with wiring layers · CPC title

• H02M3/00

  Conversion of DC power input into DC power output · CPC title

• H01L23/5223

  Electricity · mapped topic

• H01L28/91

  Electricity · mapped topic

• H01L2924/00

  Electricity · mapped topic