Semiconductor device and driver circuit with an active device and isolation structure interconnected through a resistor circuit, and method of manufacture thereof

Patent metadata

Field	Value
Publication number	US-9704853-B2
Application number	US-201213671506-A
Country	US
Kind code	B2
Filing date	Nov 7, 2012
Priority date	Jun 29, 2012
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within a portion of the substrate contained by the isolation structure, and a resistor circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region, which is separated from the isolation structure by a portion of the semiconductor substrate having the first conductivity type. The resistor circuit is connected between the isolation structure and the body region. The resistor circuit may include one or more resistor networks and, optionally, a Schottky diode and/or one or more PN diode(s) in series and/or parallel with the resistor network(s).

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate having a first conductivity type and a top substrate surface;
a buried layer below the top substrate surface, wherein the buried layer has a second conductivity type that is different from the first conductivity type;
a sinker region between the top substrate surface and the buried layer, wherein the sinker region has the second conductivity type, and an isolation structure that isolates a portion of the substrate from a remainder of the semiconductor substrate is formed by the sinker region and the buried layer;
an active device in the semiconductor substrate within the portion of the substrate contained by the isolation structure, wherein the active device includes
a drift region of the first conductivity type within a central portion of the active area and extending from the top substrate surface into the semiconductor substrate,
a drain region of the first conductivity type, wherein the drain region extends into the drift region from the top substrate surface, and
a body region of the second conductivity type extending from the top substrate surface into the semiconductor substrate and positioned between the drift region and the isolation structure, wherein the body region and the isolation structure are separated by a portion of the semiconductor substrate having the first conductivity type; and

a resistor circuit having a first terminal connected to the isolation structure and a second terminal connected to the body region.

2. The semiconductor device of claim 1 , wherein the resistor circuit comprises:
a polycrystalline silicon resistor.

3. The semiconductor device of claim 1 , wherein the resistor circuit comprises:
a first resistive network; and
a Schottky diode coupled to the first resistive network, wherein the Schottky diode is formed from a Schottky contact coupled with the isolation region.

4. The semiconductor device of claim 3 , wherein:
the Schottky diode is coupled to the first resistive network in series.

5. The semiconductor device of claim 3 , wherein:
the Schottky diode is coupled to the first resistive network in parallel.

6. The semiconductor device of claim 5 , wherein the resistor circuit further comprises:
a second resistive network coupled to the Schottky diode in series.

7. The semiconductor device of claim 3 , wherein the resistor circuit further comprises:
a PN junction diode coupled to the Schottky diode in parallel.

8. The semiconductor device of claim 1 , wherein the resistor circuit comprises:
a first resistive network; and
a PN junction diode coupled to the first resistive network.

9. The semiconductor device of claim 8 , wherein:
the PN junction diode is coupled to the first resistive network in series.

10. The semiconductor device of claim 8 , wherein:
the PN junction diode is coupled to the first resistive network in parallel.

11. The semiconductor device of claim 10 , wherein the resistor circuit further comprises:
a second resistive network coupled to the PN junction diode in series.

12. The semiconductor device of claim 8 , further comprising:
a further region of the first conductivity type extending into the sinker region, wherein the PN junction diode is formed between the further region and the sinker region.

13. The semiconductor device of claim 8 , wherein the PN junction diode comprises a polycrystalline silicon diode.

14. The semiconductor device of claim 1 , wherein the active device comprises:
a drift region of the first conductivity type within a central portion of the active area and extending from the top substrate surface into the semiconductor substrate;
a drain region of the first conductivity type extending into the drift region from the top substrate surface;
the body region extending from the top substrate surface into the semiconductor substrate between the drift region and the isolation structure; and
a source region of the first conductivity type extending into the body region from the top substrate surface.

15. A driver circuit comprising:
a first laterally diffused metal oxide semiconductor field effect transistor (LDMOSFET) formed on a semiconductor substrate having a first conductivity type and a top substrate surface, wherein the first LDMOSFET includes
a buried layer below the top substrate surface, wherein the buried layer has a second conductivity type that is different from the first conductivity type,
a sinker region between the top substrate surface and the buried layer, wherein the sinker region has the second conductivity type, and an isolation structure that isolates a portion of the substrate from a remainder of the semiconductor substrate is formed by the sinker region and the buried layer,
an active device in the semiconductor substrate within the portion of the substrate contained by the isolation structure, wherein the active device includes
a drift region of the first conductivity type within a central portion of the active area and extending from the top substrate surface into the semiconductor substrate,
a drain region of the first conductivity type, wherein the drain region extends into the drift region from the top substrate surface, and
a body region of the second conductivity type extending from the top substrate surface into the semiconductor substrate and positioned between the drift region and the isolation structure, wherein the body region and the isolation structure are separated by a portion of the semiconductor substrate having the first conductivity type; and

a resistor circuit having a first terminal connected to the isolation structure and a second terminal connected to the body region.

16. The driver circuit of claim 15 , wherein the resistor circuit comprises:
a polycrystalline silicon resistor.

17. The driver circuit of claim 15 , wherein the resistor circuit comprises:
a first resistive network; and
a Schottky diode coupled to the first resistive network, wherein the Schottky diode is formed from a Schottky contact coupled with the isolation region.

18. The driver circuit of claim 17 , wherein the Schottky diode is coupled to the first resistive network in parallel, and the resistor circuit further comprises:
a second resistive network coupled to the Schottky diode in series.

19. The driver circuit of claim 15 , wherein the resistor circuit comprises:
a first resistive network; and
a PN junction diode coupled to the resistive network.

20. The driver circuit of claim 19 , further comprising:
a further region of the first conductivity type extending into the sinker region, wherein the PN junction diode is formed between the further region and the sinker region.

21. The driver circuit of claim 19 , wherein the PN junction diode comprises a polycrystalline silicon diode.

22. The driver circuit of claim 19 , wherein the PN junction diode is coupled to the first resistive network in parallel, and the resistor circuit further comprises:
a second resistive network coupled to the PN junction diode in series.

23. A method for forming a semiconductor device, the method comprising the steps of:
forming a buried layer below a top substrate surface of a semiconductor substrate having a first conductivity type, wherein the buried layer has a second conductivity type that is different from the first conductivity type;
forming a sinker region between the top substrate surface and the buried layer, wherein the

Assignees

• Bode Hubert M
• Chen Weize
• De Souza Richard J
• Parris Patrice M
• Nxp Usa Inc

Inventors

• Bode Hubert M
• Chen Weize
• De Souza Richard J
• Parris Patrice M

Classifications

• H10P14/2905

  Silicon, silicon germanium or germanium · CPC title

• H10W10/031

  of isolation regions comprising PN junctions · CPC title

• H10W10/30

  Isolation regions comprising PN junctions · CPC title

• H01L27/0629

  Electricity · mapped topic

• H01L29/0869

  Electricity · mapped topic