Self-detecting a heating event to non-volatile storage

Patent metadata

Field	Value
Publication number	US-9704595-B1
Application number	US-201615087242-A
Country	US
Kind code	B1
Filing date	Mar 31, 2016
Priority date	Mar 31, 2016
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

Techniques are provided for non-volatile storage self-detecting that a heating event has occurred to the non-volatile storage. One example of the heating event is an Infrared (IR) reflow process. In one aspect, a block of memory cells in a memory device are put through a number of program/erase cycles. A group of the memory cells in the cycled block are programmed to a reference threshold voltage distribution. Some time may pass after programming the cycled block. The memory device self-detects that there has been a heating event in response to a shift in the reference V T distribution being more than an allowed amount. The memory device may switch from a first programming mode to a second programming mode in response to detecting that the heating event has occurred.

First claim

What is claimed is:

1. A non-volatile storage device, comprising:
a plurality of memory cells; and
managing circuitry in communication with the plurality of memory cells, the managing circuitry configured to perform a plurality of program/erase cycles on a group of the plurality of memory cells, program the cycled group of memory cells to a reference threshold voltage distribution, and determine that the non-volatile storage device has undergone a heating event in response to a shift in the reference threshold voltage distribution.

2. The non-volatile storage device of claim 1 , wherein the plurality of memory cells comprises a fresh group that has not undergone a plurality of program/erase cycles, the managing circuitry further configured to program the fresh group to the reference threshold voltage distribution when the memory cells in the cycled group are programmed to the reference threshold voltage distribution, the managing circuitry further configured to determine that the non-volatile storage device has undergone the heating event based on a comparison of a shift in the reference threshold voltage distribution of the fresh group with the shift in the reference threshold voltage distribution of the cycled group.

3. The non-volatile storage device of claim 1 , wherein the managing circuitry is further configured to switch from operating the non-volatile storage device in a first programming mode to a second programming mode in response to determining that the non-volatile storage device has undergone the heating event.

4. The non-volatile storage device of claim 3 , wherein the first programming mode is a safe mode and the second programming mode is a normal mode.

5. The non-volatile storage device of claim 1 , wherein the shift in the reference threshold voltage distribution of the cycled group is that more than an allowed number of memory cells in the cycled group have a threshold voltage below a specified voltage level.

6. The non-volatile storage device of claim 1 , wherein the shift in the reference threshold voltage distribution of the cycled group is based on a voltage level that characterizes a point on the reference threshold voltage distribution.

7. The non-volatile storage device of claim 6 , wherein the point on the reference threshold voltage distribution is a lower tail.

8. The non-volatile storage device of claim 6 , wherein the point on the reference threshold voltage distribution is a measure of central tendency.

9. The non-volatile storage device of claim 1 , wherein the heating event is an Infrared (IR) reflow.

10. The non-volatile storage device of claim 1 , further comprising a three-dimensional memory array that comprises the plurality of memory cells.

11. A method comprising:
cycling a block of memory cells in a memory device through a plurality of program/erase operations;
programming a group of the memory cells in the cycled block to a reference threshold voltage distribution after the cycling;
detecting, by the memory device in response to a shift in the reference threshold voltage distribution exceeding an allowed amount, that the memory device has undergone a heating event; and
switching from operating the memory device in a first programming mode to a second programming mode in response to the memory device detecting that the memory device has undergone the heating event.

12. The method of claim 11 , further comprising:
programming a group of memory cells in a fresh block that has not been through a plurality of program/erase operations to the reference threshold voltage distribution when the memory cells in the cycled block are programmed to the reference threshold voltage distribution, the detecting that the memory device has undergone the heating event is based on a comparison of a shift in the reference threshold voltage distribution in the fresh block with the shift in the reference threshold voltage distribution in the cycled block.

13. The method of claim 12 , wherein the comparison of the shift in the reference threshold voltage distribution in the fresh block with the shift in the reference threshold voltage distribution in the cycled block comprises either:
a comparison of a point that characterizes a lower tail on the reference threshold voltage distribution in the fresh block with a point that characterizes a lower tail on the reference threshold voltage distribution in the cycled block; or
a comparison of a point on the reference threshold voltage distribution in the fresh block that characterizes a central tendency with a point on the reference threshold voltage distribution in the cycled block that characterizes a central tendency.

14. The method of claim 11 , wherein the detecting that the memory device has undergone a heating event comprises:
inferring that the heating event has occurred in response to more than a specified number of memory cells in the group in the cycled block having a threshold voltage below a voltage level that characterizes an Infrared (IR) reflow.

15. The method of claim 11 , wherein the detecting that the memory device has undergone a heating event comprises:
comparing a first metric that characterizes a point on the reference threshold voltage distribution with a second metric that characterizes the same point on the reference threshold voltage distribution at the time the reference threshold voltage distribution was programmed; and
determining that a difference between the first metric and the second metric exceeds a criterion that indicates solder reflow has occurred.

16. A 3D stacked non-volatile storage device, comprising:
a substrate;
a three-dimensional memory array that resides above the substrate, the three-dimensional memory array comprising a plurality of blocks of non-volatile storage elements; and
managing circuitry in communication with the plurality of blocks of non-volatile storage elements, the managing circuitry performs a plurality of program/erase cycles on a block of the non-volatile storage elements, programs selected non-volatile storage elements in the cycled block to a reference threshold voltage distribution, and detects that the 3D stacked non-volatile storage device has undergone a heating event in response to the reference threshold voltage distribution shifting by more than an amount that is associated with the heating event.

17. The 3D stacked non-volatile storage device of claim 16 , wherein the heating event is associated with a soldering temperature.

18. The 3D stacked non-volatile storage device of claim 16 , wherein the heating event is an Infrared (IR) reflow event.

19. The 3D stacked non-volatile storage device of claim 16 , wherein the heating event is a solder reflow event.

20. A non-volatile storage device, comprising:
means for cycling a block of memory cells in the non-volatile storage device through a plurality of program/erase operations;
means for programming a group of the memory cells in the cycled block to a reference threshold voltage distribution after the cycling; and
means for determining that the non-volatile storage device has undergone a heating event in response to a shift in the reference threshold voltage distribution.

Assignees

• Sandisk Technologies Inc
• Sandisk Technologies Llc

Inventors

• Eyal Alon
• Alrod Idan
• Sharon Eran
• Ilani Ishai
• Murin Mark
• Rozman David
• Lien Wei-Cheng
• Dutta Deepanshu
• Chen Changyuan

Classifications

• G11C16/14

  Circuits for erasing electrically, e.g. erase voltage switching circuits · CPC title

• G11C16/3431 Primary

  Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step · CPC title

• G11C13/0004

  comprising amorphous/crystalline phase transition cells · CPC title

• G11C7/1045

  Read-write mode select circuits · CPC title

• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title