Information processing apparatus, method for controlling the same and program

Patent metadata

Field	Value
Publication number	US-9703298-B2
Application number	US-201314374506-A
Country	US
Kind code	B2
Filing date	Oct 30, 2013
Priority date	Nov 7, 2012
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

An information processing apparatus according to an aspect of the present invention generates temperature distribution information (updated temperature information) that indicates the current temperature distribution in a memory chip, based on predetermined temperature information generated by an analysis executed in advance and temperature information obtained by a temperature sensor. The predetermined temperature information includes information related to the temperature distribution in the memory chip that corresponds to the operating states of an SoC die and a wide IO memory device. The information processing apparatus sets a thermal offset value to be used in the refresh operation of the memory chip, according to the difference between the temperature at the location of the temperature sensor and the temperature at a hotspot in the memory chip, which are included in the temperature distribution indicated by the updated temperature information.

First claim

The invention claimed is:

1. An information processing apparatus comprising:
a wide IO memory device stacked on an SoC (System on Chip);
at least one CPU configured to perform the steps of:
acquiring, from a temperature sensor provided in a memory chip that is included in the wide IO memory device, sensor information that indicates a temperature of the memory chip at the location of the temperature sensor;
generating temperature distribution information that indicates a current temperature distribution in the memory chip, based on the sensor information acquired by the acquisition and predetermined temperature information that includes information that was generated using an analysis executed in advance and is related to the temperature distribution in the memory chip, the predetermined temperature information corresponding to operating states of the SoC die and the wide IO memory device; and
setting a thermal offset value to be used for a refresh operation of the memory chip in accordance with a difference between a first temperature at a location at which the temperature is the highest in the memory chip and a second temperature at the location of the temperature sensor, wherein the first and second temperatures are included in the temperature distribution indicated by the temperature distribution information.

2. The information processing apparatus according to claim 1 ,
wherein the generation, using the temperature at the location of the temperature sensor indicated by the sensor information as a reference, generates the temperature distribution information based on the predetermined temperature information that corresponds to the operating states of the SoC die and the wide IO memory device.

3. The information processing apparatus according to claim 1 ,
wherein the predetermined temperature information includes information that indicates change with time in the temperature distribution in the memory chip and corresponds to the operating states of the SoC die and the wide IO memory device, after the SoC die has started a specific operation; and
the generation specifies elapsed time since the SoC die started the specific operation by comparing change in temperature in the memory chip in accordance with the specific operation at the location of the temperature sensor indicated by the predetermined temperature information, and the temperature indicated by the sensor information, and generates information indicating the temperature distribution in the memory chip corresponding to the elapsed time as the temperature distribution information.

4. The information processing apparatus according to claim 3 ,
wherein the generation specifies, as the elapsed time, a period of time from when the SoC die started the specific operation until when the temperature of the memory chip at the location of the temperature sensor changes to the temperature indicated by the sensor information in accordance with the specific operation.

5. The information processing apparatus according to claim 3 ,
wherein the predetermined temperature information includes information indicating the temperature at a plurality of different points in time after the SoC die started the specific operation with respect to areas obtained by dividing the memory chip into a plurality of areas, and
for each of the areas, the generation calculates an approximate curve that indicates change in temperature according to the specific operation of the SoC die, based on the temperatures at the plurality of points in time that are included in the predetermined temperature information, and specifies the elapsed time based on the approximate curve calculated for an area in which the temperature sensor is included.

6. The information processing apparatus according to claim 5 ,
wherein the generation, based on the plurality of approximate curves corresponding to the plurality of areas, generates information indicating the temperature distribution in the memory chip corresponding to the elapsed time as the temperature distribution information.

7. The information processing apparatus according to claim 1 , wherein the at least one CPU is further configured to
update the generated temperature distribution information at an update interval set in advance, based on the predetermined temperature information,
wherein the setting periodically executes setting of the thermal offset value based on the temperature distribution information that was generated by the generation or that was updated by the updating.

8. The information processing apparatus according to claim 7 ,
wherein the updating updates the temperature distribution information based on the predetermined temperature information corresponding to the operating states of the SoC die and the wide IO memory device using the temperature at the location of the temperature sensor included in the temperature distribution information that was generated by the generation or that was most recently updated as a reference.

9. The information processing apparatus according to claim 7 ,
wherein if the difference between the temperature at the location of the temperature sensor included in the temperature distribution information that was updated by the updating, and the temperature indicated by the sensor information exceeds a predetermined threshold value, the setting sets the thermal offset value to a largest value among possible values.

10. The information processing apparatus according to claim 9 , wherein the at least one CPU is further configured to,
if the difference between the temperature at the location of the temperature sensor included in the temperature distribution information that was updated by the updating and the temperature indicated by the sensor information is at or below the predetermined threshold value, correct the temperature distribution indicated by the temperature distribution information in accordance with the difference.

11. The information processing apparatus according to claim 1 ,
wherein the setting sets the thermal offset value to a higher value as the difference increases between the second temperature at the location of the temperature sensor and the first temperature at a location at which the temperature is the highest in the memory chip, wherein the first and second temperatures are included in the temperature distribution indicated by the temperature distribution information.

12. The information processing apparatus according to claim 1 ,
wherein the memory chip is used in a state of being divided into a plurality of chip areas corresponding to a plurality of memory channels included in the wide TO memory device, a temperature sensor being provided individually in each of the chip areas,
the generation generates the temperature distribution information individually for each of the plurality of chip areas, and
the setting sets the thermal offset value individually for each of the plurality of chip areas.

13. The information processing apparatus according to claim 1 ,
wherein the predetermined temperature information is generated individually in advance in accordance with individual operating states of the SoC die and the wide IO memory device.

14. The information processing apparatus according to claim 1 ,
wherein the temperature distribution in the memory chip is a distribution of temperatures at a surface of the memory chip.

15. The information processing apparatus according to claim 1 ,
wherein in a case of causing the memory chip to shift to a self-refresh state, the CPU causes the memory chip to execute the refresh operation at a refresh cycle that corresponds to

Assignees

• Canon Kk

Inventors

• Sato Yoshikazu

Classifications

• G11C11/40626

  Temperature related aspects of refresh operations · CPC title

• G05B15/02

  electric · CPC title

• G11C11/40611 Primary

  External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh · CPC title

• G05D23/19 Primary

  characterised by the use of electric means {(G05D23/1393 takes precedence)} · CPC title