Analogue amplification device intended in particular for a laser anemometer

US9702891B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9702891-B2
Application numberUS-201314423402-A
CountryUS
Kind codeB2
Filing dateAug 14, 2013
Priority dateAug 23, 2012
Publication dateJul 11, 2017
Grant dateJul 11, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

An analogue amplification device comprises a first stage with a common base or gate transistor that receives the modulated input current on its emitter or its source and the output signal of this first stage corresponds to the signal of the collector, a second stage formed by a follower amplifier comprising a transistor with a common collector or drain setup, a third stage that comprises a transistor with a common emitter setup, and a fourth stage that is an amplifying stage with means allowing the realization of, on the one hand, an amplification, and on the other hand, a matching of impedance. The device can be applied to a laser anemometer with optical retro-injection.

First claim

Opening claim text (preview).

The invention claimed is: 1. An analogue amplification device comprising: an input for receiving a modulated current; an output configured to supply an output voltage; a ground terminal; a supply voltage terminal; a first stage that comprises a first capacitor and a first transistor with an emitter or a source, a collector or a drain, and a common base or gate setup, the emitter or source of the first transistor being arranged to receive the modulated current via the first capacitor, the first stage being configured to supply a first output signal that corresponds to a signal of the collector or drain, a second stage formed by a follower amplifier comprising a second transistor with a common collector or drain setup, the second transistor including a collector or drain, a base or gate that receives the first output signal of the first stage, and an emitter or a source, the collector or drain of the second transistor being connected to the supply terminal and the emitter or source of the second transistor being connected to the ground terminal by a resistor and is configured to provide a second output signal of the second stage, a third stage that comprises a third transistor with a common emitter or common source setup with decoupling of a resistance of an emitter or a source of the third transistor, wherein the third transistor includes a base or gate that receives the second output signal of the second stage via a second capacitor and the third stage is configured to provide a third output signal corresponds to a signal of a collector or drain of the third transistor, and a fourth stage that is an amplifying stage configured to provide an amplification and a matching of impedance. 2. The analogue amplification device according to claim 1 , wherein the first stage includes: a first resistor connecting the emitter or the source of the first transistor to the ground terminal, a third capacitor connecting the base or gate of the first transistor to the ground terminal, whereby a potential of the base or gate of the first transistor is maintained at a potential close to the ground, and a second resistor connecting the collector or the drain of the first transistor to the supply voltage terminal. 3. The analogue amplification device according to claim 1 , wherein the base or the gate of the third transistor is polarized at a voltage close to a voltage of the ground terminal, wherein the third stage includes: an RC circuit connecting the emitter or the source of the third transistor to the ground terminal, and a resistor connecting the collector or the drain of the third transistor to the supply voltage terminal. 4. The analogue amplification device according to claim 1 , wherein the fourth stage comprises an amplifying circuit selected from the group consisting of: an operational amplifier circuit, and an amplifier stage with a fourth transistor and a follower stage, the follower stage including a fifth transistor or an operational amplifier. 5. The analogue amplification device according to claim 1 , wherein the fourth stage comprises a third capacitor and an operational amplifier having a non-inverted input that receives the third output signal of the third stage via the third capacitor, the operational amplifier having an output that corresponds to the output of the amplification device. 6. The analogue amplification device according to claim 5 , wherein: an inverted input of the operational amplifier is connected to the ground terminal by a first resistor and by a third capacitor in series, the output of the operational amplifier is connected to the inverted input by a second resistor, and the non-inverted input of the operational amplifier is biased at a voltage corresponding approximately to one half of a supply voltage of the supply voltage terminal. 7. The analogue amplification device according to claim 5 , wherein the operational amplifier of the fourth stage is an amplifier with counter-reaction current. 8. The analogue amplification device according to claim 1 , wherein the first transistor is an NPN transistor. 9. The analogue amplification device according to claim 1 , wherein the second transistor has the same characteristics as the first transistor. 10. The analogue amplification device according to claim 1 , wherein the third transistor has the same characteristics as the first transistor. 11. A unit comprising an analogue amplification device and a supply system configured to supply the analogue amplification device, wherein the analogue amplification device is a device according to claim 1 , and the supply system comprises: an input filter; a first filtering module that simultaneously allows an insulation and a low frequency decoupling and an insulation and a high frequency decoupling between the input filter and the first stage of the amplification device; a second filtering module that simultaneously allows an insulation and a low frequency decoupling and an insulation and a high frequency decoupling between the input filter and the second stage of the amplification device; a third filtering module that simultaneously allows an insulation and a low frequency decoupling and an insulation and a high frequency decoupling between the input filter and the third stage of the amplification device; and a fourth filtering module that simultaneously allows an insulation and a low frequency decoupling and an insulation and a high frequency decoupling between the input filter and the fourth stage of the amplification device;. 12. The unit according to claim 11 , wherein each filtering module comprises a supply track on which are located a linear regulator and a ferrite. 13. A Doppler-effect laser anemometer with optical retro-injection comprising: a laser diode for transmitting a laser beam, a lens for focusing a beam transmitted by the laser diode and a beam reflected by a particle located in a measuring volume, which reflected beam corresponds to a beam transmitted by the laser diode, a photodiode for receiving the reflected beam after it has traversed the laser diode, means for producing an amplified signal by amplifying a signal supplied by the photodiode, and means for processing the amplified signal, wherein the amplification means comprise the analogue amplification device according to claim 1 .

Assignees

Inventors

Classifications

  • G01P5/26Primary

    by measuring the direct influence of the streaming fluid on the properties of a detecting optical wave · CPC title

  • Modifications of input or output impedances, not otherwise provided for · CPC title

  • Two or more capacitor coupled amplifier stages in cascade · CPC title

  • the biasing of the differential amplifier being controlled from the input or the output signal · CPC title

  • Two or more differential amplifiers cascade coupled · CPC title

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What does patent US9702891B2 cover?
An analogue amplification device comprises a first stage with a common base or gate transistor that receives the modulated input current on its emitter or its source and the output signal of this first stage corresponds to the signal of the collector, a second stage formed by a follower amplifier comprising a transistor with a common collector or drain setup, a third stage that comprises a tran…
Who is the assignee on this patent?
Epsiline, Inst Nat Polytechnique Toulouse
What technology area does this patent fall under?
Primary CPC classification G01P5/26. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 11 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).