Golden finger and board edge interconnecting device

US9699901B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9699901-B2
Application numberUS-201314016398-A
CountryUS
Kind codeB2
Filing dateSep 3, 2013
Priority dateJan 19, 2012
Publication dateJul 4, 2017
Grant dateJul 4, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A golden finger and a board edge interconnecting device are disclosed. The golden finger includes a printed circuit board (PCB) surface layer and at least one PCB inner layer, where a metal foil of the PCB inner layer is connected to a metal foil of the PCB surface layer through a current-carrying structure, so that a current-carrying channel of the golden finger passes through the PCB surface layer and the PCB inner layer. The board edge interconnecting device includes the foregoing golden finger. In the embodiments, a current-carrying capacity of a PCB in the golden finger is increased without increasing a size and thickness of a copper foil of the PCB in the golden finger, thereby effectively improving the current-carrying capacity of the PCB in the golden finger.

First claim

Opening claim text (preview).

What is claimed is: 1. A golden finger, comprising: a printed circuit board (PCB) surface layer; at least one PCB inner layer; and an insulation layer between the PCB surface layer and the at least one PCB inner layer, wherein a metal foil of the PCB inner layer is connected to a metal foil of the PCB surface layer through a current-carrying structure such that a current-carrying channel of the golden finger passes through the PCB surface layer and the PCB inner layer, wherein an edge of the golden finger comprises an edge of the PCB surface layer, an edge of the PCB inner layer, an edge of the insulation layer, an edge of a PCB pin, and an edge after an interior of the golden finger that is notched, wherein the edge of the PCB surface layer, the edge of the PCB inner layer, the edge of the insulation layer, the edge of the PCB pin, and the edge after the interior of the golden finger that is notched form at least four sidewalls of the golden finger, wherein the at least four sidewalls of the golden finger comprise a sidewall copperization such that an entire surface of each of the at least four sidewalls of the golden finger is covered in copper, wherein the sidewall copperization connects the metal foil of the PCB inner layer to the metal foil of the PCB surface layer such that a current-carrying capacity of the golden finger is increased, wherein multiple vias are disposed between the PCB surface layer and the PCB inner layer, wherein the multiple vias comprise a through hole, a blind via, and a buried via, wherein the through hole extends from one surface layer of the PCB to another surface layer of the PCB, wherein the blind via extends from an interior of the PCB to the one surface layer of the PCB, wherein the buried via extends between PCB inner layers without extending to the one surface layer of the PCB, wherein the metal foil of the PCB surface layer is plated with gold, and wherein the PCB surface layer comprises a notch that forms a recessed groove across an entire width of a top of the golden finger. 2. The golden finger according to claim 1 , wherein the metal foil of the PCB inner layer is connected to the metal foil of the PCB surface layer through the multiple vias. 3. The golden finger according to claim 2 , wherein the PCB surface layers comprise: a PCB upper layer; and a PCB lower layer. 4. The golden finger according to claim 1 , wherein a conductive block is disposed between the PCB surface layer and the PCB inner layer, and wherein the metal foil of the PCB inner layer is connected to the metal foil of the PCB surface layer through the conductive block. 5. The golden finger according to claim 4 , wherein the PCB surface layer comprises: a PCB upper layer; and a PCB lower layer, wherein the conductive block is disposed between the PCB upper layer and the PCB inner layer and/or between the PCB lower layer and the PCB inner layer. 6. The golden finger according to claim 4 , wherein the PCB surface layer comprises: a PCB upper layer; and a PCB lower layer, wherein the conductive block is disposed between the PCB upper layer and the PCB inner layer and between the PCB inner layers. 7. The golden finger according to claim 4 , wherein the PCB surface layer comprises: a PCB upper layer; and a PCB lower layer, wherein the conductive block is disposed between the PCB lower layer and the PCB inner layer and between the PCB inner layers. 8. The golden finger according to claim 4 , wherein the PCB surface layer comprises: a PCB upper layer; and a PCB lower layer, wherein the conductive block is disposed between the PCB upper layer and the PCB lower layer. 9. The golden finger according to claim 1 , wherein the at least four sidewalk of the golden finger form a rectangular shape that surrounds the golden finger. 10. A golden finger, comprising: a printed circuit board (PCB) surface layer; at least one PCB inner layer; and an insulation layer between the PCB surface layer and the at least one PCB inner layer, wherein a metal foil of the PCB inner layer is connected to a metal foil of the PCB surface layer through a current-carrying structure such that a current-carrying channel of the golden finger passes through the PCB surface layer and the PCB inner layer, wherein an edge of the golden finger comprises an edge of the PCB surface layer, an edge of the PCB inner layer, an edge of the insulation layer, an edge of a PCB pin, and an edge after an interior of the golden finger that is notched, wherein the edge of the PCB surface layer, the edge of the PCB inner layer, the edge of the insulation layer, the edge of the PCB pin, and the edge after the interior of the golden finger that is notched form at least four sidewalls of the golden finger, wherein the at least four sidewalls of the golden finger comprise a sidewall copperization such that an entire surface of each of the at least four sidewalk of the golden finger is covered in copper, wherein the sidewall copperization connects the metal foil of the PCB inner layer to the metal foil of the PCB surface layer such that a current-carrying capacity of the golden finger is increased, wherein the metal foil of the PCB surface layer is plated with gold, wherein vias are disposed between the PCB surface layer and the PCB inner layer, wherein the multiple vias comprise a through hole, a blind via, and a buried via, wherein the through hole extends from one surface layer of the PCB to another surface layer of the PCB, wherein the blind via extends from an interior of the PCB to the one surface layer of the PCB, wherein the buried via extends between PCB inner layers without extending to the one surface layer of the PCB, and wherein the PCB surface layer comprises a notch that forms a recessed groove across an entire width of a top of the golden finger. 11. The golden finger according to claim 10 , wherein the at least four sidewalls of the golden finger form a rectangular shape that surrounds the golden finger. 12. A golden finger, comprising: a first printed circuit board (PCB) surface layer; a first insulation layer adjacent to the first PCB surface layer; a first PCB inner layer adjacent to the first insulation layer; a second insulation layer adjacent to the first PCB inner layer; a second PCB inner layer adjacent to the second insulation layer; a third insulation layer adjacent to the second PCB inner layer; and a second PCB surface layer adjacent to the third insulation layer, wherein the first PCB surface layer, the first insulation layer, the first PCB inner layer, the second insulation layer, the second PCB inner layer, the third insulation layer, and the second PCB surface layer form four outer sidewalls of the golden finger, wherein the four outer sidewalls of the golden finger comprise a sidewall copperization such that an entire surface of each of the four outer sidewalls of the golden finger is covered in copper, wherein a metal foil of the first PCB surface layer is plated with gold, wherein multiple vias are disposed between the first PCB surface layer and the first PCB inner layer, wherein the multiple vias comprise a through hole, a blind via, and a buried via, wherein the through hole extends from one surface layer of the PCB to another surface layer of the PCB, wherein the blind via extends from an interior of the PCB to the one surface layer of the PCB, wherein the buried via extends between PCB inner layers without extending to the one surface layer of the PCB, and wherein the first PCB surface layer comprises a notch that forms a recessed groove across an entire width of a top of the golden finger.

Assignees

Inventors

Classifications

  • Multilayer circuits · CPC title

  • H05K1/117Primary

    Pads along the edge of rigid circuit boards, e.g. for pluggable connectors · CPC title

  • Exposing inner circuit layers or metal planes at the side edge of the printed circuit board [PCB] or at the walls of large holes · CPC title

  • characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections · CPC title

  • using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire · CPC title

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What does patent US9699901B2 cover?
A golden finger and a board edge interconnecting device are disclosed. The golden finger includes a printed circuit board (PCB) surface layer and at least one PCB inner layer, where a metal foil of the PCB inner layer is connected to a metal foil of the PCB surface layer through a current-carrying structure, so that a current-carrying channel of the golden finger passes through the PCB surface …
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H05K1/117. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 04 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).