Digital pre-distortion for multiple-power amplifier transceivers
US-2024429953-A1 · Dec 26, 2024 · US
US9698835B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9698835-B2 |
| Application number | US-201514704929-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 5, 2015 |
| Priority date | May 5, 2014 |
| Publication date | Jul 4, 2017 |
| Grant date | Jul 4, 2017 |
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A method for carrying data on a live host signal, comprising the steps of: varying timing in a host signal in response to data to be encoded, wherein variations in timing are smaller than a sampling period for detection and capture of the digital signal receiving the live host signal; sensing pulse timing variations in the received live host signal by comparison to a reference signal; and determining information in the sensed timing variations.
Opening claim text (preview).
What is claimed is: 1. A method for measuring timing variations and/or deviation from ideal waveform transitions in a first host signal, comprising: reconstructing a second host signal using the first host signal with reference to a stable clock signal; simultaneously phase detecting both the first host signal and the second host signal against a common stable clock signal; and comparing the phase detected signals for producing a signal indicating the relative timing variation within the first host signal. 2. The method of claim 1 , further comprising the step of deriving data from the indicated relative timing variation within the first host signal. 3. The method of claim 1 , wherein the stable clock signal and the common clock signal are the same signal. 4. The method of claim 1 , wherein the second host signal reconstructed with reference to the stable clock signal has negligible relative timing variation. 5. The method of claim 1 , wherein the stable clock signal has timing stability that is better than the timing variations of the first host signal. 6. The method of claim 1 , wherein the first host signal and the clock signal include an identical known timing variation. 7. The method of claim 1 , wherein the step of comparing adds or subtracts the phase detected first and second host signals. 8. The method of claim 1 , wherein the first host signal is a digital signal. 9. The method of claim 1 , wherein the first host signal is an analog signal. 10. A system for measuring timing variations and/or deviation from ideal waveform transitions in a first host signal, comprising: a processor adapted to reconstructing a second host signal using the first host signal with reference to a stable clock signal; a pair of phase detectors coupled to simultaneously phase detect both the first host signal and the second host signal against a common stable clock signal; and a comparator coupled for comparing the phase detected signals from the pair of phase detectors for producing a signal indicating the relative timing variation within the first host signal. 11. The system of claim 10 , wherein the processor constructs the second host signal to have negligible relative timing variation. 12. The system of claim 10 , further comprising a stable oscillator or clock for providing the stable clock signal and the common clock signal. 13. The system of claim 12 , wherein the stable clock signal has timing stability that is better than the timing variations of the first host signal. 14. The system of claim 10 , wherein the comparator adds or subtracts the phase detected first and second host signals.
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