Digital isolator

Patent metadata

Field	Value
Publication number	US-9698728-B2
Application number	US-201314103386-A
Country	US
Kind code	B2
Filing date	Dec 11, 2013
Priority date	Dec 13, 2012
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.

First claim

What is claimed is:

1. A digital isolator, comprising:
an isolation element comprising at least one input node and at least one output node;
an input circuit electronically coupled to the at least one input node, the input circuit configured to receive an input data signal and generate modulated differential data signals based on modulating the input data signal on a carrier signal of a carrier frequency, and operate using a first supply voltage with respect to a first ground, and the input circuit positioned to provide the modulated differential data signals to the at least one input node; and
an output circuit electronically coupled to the at least one output node such that the output circuit is positioned to receive the modulated differential data signals, the output circuit configured to operate using a second supply voltage with respect to a second ground,
wherein the input circuit includes an on-off keying (OOK) modulator configured to generate a modulated data signal in response to the input data signal and the carrier signal, the input circuit generating the modulated differential data signals based on the modulated data signal, and
wherein the output circuit includes a frequency-shift keying (FSK) demodulator configured to detect a presence of the carrier signal in the modulated differential data signals and generate a demodulated data signal in response to the presence of the carrier signal, the output circuit being further configured to generate an output data signal in response to the demodulated data signal.

2. The digital isolator as claimed in claim 1 , wherein the input circuit comprises:
a pre-driver circuit electronically coupled to the modulator, the pre-driver circuit responsive to the modulated data signal to provide modulated complementary signals; and
a driver circuit electronically coupled between the pre-driver circuit and the at least one input node, the driver circuit configured to amplify the modulated complementary signals to generate the modulated differential data signals.

3. The digital isolator as claimed in claim 2 , wherein the input circuit further comprises:
a clock generator electronically coupled to the modulator, the clock generator configured to generate the carrier signal at the carrier frequency; and
a first power supply low dropout regulator (LDO) configured to provide the first supply voltage to the input circuit.

4. The digital isolator as claimed in claim 3 , wherein the output circuit comprises:
a filter circuit electronically coupled to the at least one output node of the isolation element to receive the modulated differential data signals, the filter circuit configured to generate filtered modulated differential data signals by attenuating common mode transient (CMT) signal components from the modulated differential data signals and by attenuating signal components comprising frequencies less than the carrier frequency of the carrier signal;
a comparator electronically coupled between the filter circuit and the FSK demodulator, the comparator configured to amplify the filtered modulated differential data signals of the filter circuit to generate an amplified modulated data signal, wherein the amplified modulated data signal is provided to the FSK demodulator for generating the demodulated data signal; and
a second power supply LDO configured to provide the second supply voltage to the output circuit.

5. The digital isolator as claimed in claim 4 , wherein the output circuit further comprises:
a level shifter electronically coupled to an output of the FSK demodulator, the level shifter responsive to the demodulated data signal to level shift the demodulated data signal to generate the output data signal.

6. The digital isolator as claimed in claim 5 , wherein the isolation element comprises one of one or more capacitors, one or more transformers, and one or more inductors.

7. The digital isolator as claimed in 6 , wherein the isolation element is a capacitor.

8. The digital isolator as claimed in claim 7 , wherein the filter circuit comprises a pair of high pass filter circuits responsive to the modulated differential data signals, each of the pair of high pass filter circuits comprising:
a first stage filter configured by the isolation element and a first bias resistor, the first stage filter configured to receive one of a first signal and a second signal of the modulated differential data signals to generate a first stage filtered data signal; and
a second stage filter in cascade connection with the first stage filter comprising a capacitor and a second bias resistor, the second stage filter configured to filter the first stage filtered data signal to generate one of a first signal and a second signal of the filtered modulated differential data signals.

9. The digital isolator as claimed in claim 5 , wherein the FSK demodulator is a switch-capacitor potential divider based frequency detector.

10. The digital isolator as claimed in claim 9 , wherein the FSK demodulator comprises:
a demodulation comparator comprising a first input terminal and a second input terminal, the first input terminal electronically coupled to a node and the second input terminal configured to receive a reference signal, the demodulation comparator configured to generate the demodulated data signal in response to a difference between a voltage signal at the node and the reference signal;
a pull-up element electronically coupling the second supply voltage to the node; and
a switched capacitor circuit configured to generate the voltage signal at the node, the switched capacitor circuit comprising:
a switching capacitor comprising a first terminal and a second terminal, the first terminal electronically coupled to the second ground;
a first switch positioned to electronically couple the second terminal of the switching capacitor to the second ground for providing a discharge path to the switching capacitor, the first switch being controlled by a first phase signal comprising the amplified modulated data signal; and
a second switch positioned to electronically couple the second terminal of the switching capacitor to the node for providing a charging path to the switching capacitor from the second supply voltage, the second switch being controlled by a second phase signal comprising a complementary signal of the amplified modulated data signal.

11. A frequency-shift keying demodulator, comprising:
a demodulation comparator comprising a first input terminal and a second input terminal, the first input terminal electronically coupled to a node and the second input terminal positioned to receive a reference signal, and the demodulation comparator configured to generate a demodulated data signal in response to a difference between a voltage signal at the node and the reference signal;
a pull-up element electronically coupling a supply voltage with the node; and
a first switched capacitor circuit configured to generate the voltage signal, the first switched capacitor circuit comprising:
a first switching capacitor comprising a first terminal and a second terminal, the first terminal of the first switching capacitor electronically coupled to a ground,
a first switch positioned to electronically couple the second terminal with the ground to thereby provide a discharge path to the first switching capacitor, the first switch being controlled by a first phase signal comprising a data signal modulated by a carrier frequency, and
a second switch positioned to electronically couple the second terminal with the node to thereby provide a charging path to the first switching capacitor from the supply voltage, the second switch being controlled by a second phase signal

Assignees

• Texas Instruments Inc

Inventors

• Kamath Anant Shankar
• S Sreeram N

Classifications

• H04L25/0268

  with modulation and subsequent demodulation · CPC title

• H03D3/00 Primary

  Demodulation of angle-, {frequency- or phase-} modulated oscillations (H03D5/00, H03D9/00, H03D11/00 take precedence) · CPC title