System and method for displaying a device using an automated tool

Patent metadata

Field	Value
Publication number	US-9697315-B2
Application number	US-201414501174-A
Country	US
Kind code	B2
Filing date	Sep 30, 2014
Priority date	Aug 1, 2014
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

A method comprises receiving, in a computer, an input indicative of a drawing of at least a portion of at least one layer of a semiconductor device. The at least one portion of the at least one layer is compared to corresponding portions in corresponding layers of a plurality of previously defined devices stored in a non-transitory machine readable storage medium. Each layer of at least one of the plurality of previously defined devices for which the corresponding portion in the corresponding layer matches the at least one portion of the at least one layer of the semiconductor device is displayed on a display device.

First claim

What is claimed is:

1. A method comprising:
receiving, in an electronic design automation (EDA) tool for designing devices, an input drawing drawn by a user of at least a portion of at least one layer of a semiconductor device using a stylus or pointing device, wherein the user draws the drawing to input the portion of the at least one layer to the EDA tool;
comparing, by the EDA tool, the at least one portion of the at least one layer to corresponding portions in corresponding layers of a plurality of previously defined devices having respectively different device designs and stored in a non-transitory machine readable storage medium, and determining which of the plurality of previously defined devices have corresponding portions for which designs thereof match the at least one portion drawn by the user; and
displaying, on a display device, each layer of at least one of the plurality of previously defined devices for which a corresponding design of the portion in the corresponding layer matches the at least one portion of the at least one layer of the semiconductor device drawn by the user.

2. The method of claim 1 , wherein the step of displaying displays each layer of each of the plurality of previously defined devices for which the corresponding portion in the corresponding layer matches the at least one portion of the at least one layer of the semiconductor device.

3. The method of claim 1 , wherein the at least one layer comprises a first layer having a first polygon and a second layer having a second polygon, the method further comprising:
extracting a relationship between the first polygon and the second polygon, and
comparing the extracted relationship to a corresponding relationship in the plurality of previously defined devices,
wherein the displaying step displays each of the plurality of previously defined devices for which the corresponding relationship matches the extracted relationship.

4. The method of claim 3 , wherein the step of extracting a relationship includes determining whether a perimeter of the first polygon intersects a perimeter of the second polygon.

5. The method of claim 3 , wherein the step of extracting a relationship includes determining whether a perimeter of the first polygon completely surrounds a perimeter of the second polygon.

6. The method of claim 1 , further comprising:
extracting a name of the at least one layer;
comparing the extracted name to a corresponding name of a corresponding layer in the plurality of previously defined devices; and
wherein the displaying step displays each of the plurality of previously defined devices for which the corresponding name matches the extracted name.

7. The method of claim 1 , further comprising:
receiving a selection by a user of one of the displayed devices, and
discontinuing displaying any of the previously defined devices other than the selected device.

8. The method of claim 7 , further comprising:
receiving an input by the user modifying one off the layers of the selected device; and
displaying the modified layer and the remaining layers of the selected device.

9. The method of claim 1 , wherein the step of receiving receives an input indicative of a drawing of only a single layer of the semiconductor device.

10. The method of claim 1 , wherein the step of receiving receives an input indicative of a drawing of only a portion of only a single layer of the semiconductor device.

11. A non-transitory, machine readable storage medium, encoded with computer program code, such that when the computer program code is executed by a processor, the processor performs a method comprising:
receiving, in an electronic design automation (EDA) tool for designing devices, an input drawing drawn by a user of at least a first polygon of a first physical layer of a semiconductor device and a drawing drawn by the user of at least a second polygon of a second physical layer of the semiconductor device, wherein the user draws the drawings of the first and second polygons using a stylus or pointing device to input the first polygon of the first physical layer and the second polygon of the second physical layer to the EDA tool;
extracting a relationship between the first polygon and the second polygon, wherein extracting the relationship includes one of the group consisting of:
determining whether a perimeter of the first polygon intersects a perimeter of the second polygon, or
determining whether a perimeter of the first polygon completely surrounds a perimeter of the second polygon;

comparing, by the EDA tool, the extracted relationship to a corresponding relationship in a plurality of previously defined devices having respectively different device designs and stored in a non-transitory, machine readable storage medium; and
displaying each of the plurality of previously defined devices having respective layers for which the corresponding relationship matches the extracted relationship.

12. The non-transitory, machine readable storage medium of claim 11 , wherein the step of extracting a relationship includes determining whether a perimeter of the first polygon intersects a perimeter of the second polygon.

13. The non-transitory, machine readable storage medium of claim 11 , wherein the step of extracting a relationship includes determining whether a perimeter of the first polygon completely surrounds a perimeter of the second polygon.

14. The non-transitory, machine readable storage medium of claim 11 , wherein the method further comprises:
receiving a selection by a user of one of the displayed devices, and
discontinuing displaying any of the previously defined devices other than the selected device.

15. The non-transitory, machine readable storage medium of claim 14 , wherein the method further comprises:
receiving an input by the user modifying one of the layers of the selected device; and
displaying the modified layer and the remaining layers of the selected device.

16. A system, comprising:
a non-transitory machine readable storage medium storing data representing a plurality of previously defined semiconductor devices, each having a respective plurality of physical layers; and
an electronic design automation (EDA) tool for designing devices, the EDA tool configured to:
receive an input drawing drawn by a user of at least a portion of at least one physical layer of a semiconductor device using a stylus or pointing device, wherein the user draws the drawing to input the portion of the at least one physical layer to the EDA tool;
compare the at least one portion of the at least one physical layer to corresponding portions in corresponding physical layers of the plurality of previously defined semiconductor devices having respectively different device designs and stored in a non-transitory machine readable storage medium;
identify a name of a physical layer of one of the previously defined semiconductor devices that matches the physical layer drawn by the user;
identify each of the plurality of previously defined semiconductor devices having a corresponding physical layer with a name that matches the identified name; and
display on a display device, each layer of at least one of the identified previously defined semiconductor devices for which the corresponding physical layer has a name that matches the identified name.

17. The system of claim 16 , wherein the processor is configured to receive an input indicative of a drawing of only a portion of a single physical layer of the semiconductor device, and perform the identifying based on the portion of the single physical l

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Zhang ya-min
• Chen Peng-Sheng
• Huang Mu-Jen
• Feng Ming

Classifications

• G06F30/36 Primary

  Circuit design at the analogue level · CPC title

• G06F30/398

  Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

• G06F30/39

  Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) · CPC title

• G06F17/5081

  Physics · mapped topic

• G06F17/5063 Primary

  Physics · mapped topic