Electronic device having a controller to enter a low power mode

Patent metadata

Field	Value
Publication number	US-9696785-B2
Application number	US-201314142791-A
Country	US
Kind code	B2
Filing date	Dec 28, 2013
Priority date	Dec 28, 2013
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

An electronic device may be provided that includes a first controller, a second controller, and a bus to connect between the first controller and the second controller. The electronic device may also include a first signal line between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode.

First claim

What is claimed is:

1. An electronic device comprising:
a first controller;
a second controller;
a data bus to couple between the first controller and the second controller, the data bus including a plurality of data bus lines between the first controller and the second controller;
a first signal line to couple between the first controller and the second controller, and the first controller to provide a first signal on the first signal line to the second controller to wake up the second controller from a low power mode, wherein the second controller to change a state of an interface to the data bus based on the first signal from the first controller, wherein the interface to be off when the second controller is in the low power mode, and the interface to be on when the second controller is in a normal mode; and
a second signal line to couple between the first controller and the second controller, wherein the second signal line is a different signal line than the first signal line, wherein the second controller to provide a second signal on the second signal line to the first controller, the second signal to provide an instruction to enter the low power mode, wherein the second controller to provide a third signal on the second signal line to the first controller, the third signal to provide an instruction to exit the low power mode.

2. The electronic device of claim 1 , wherein the first controller is an input/output controller.

3. The electronic device of claim 1 , wherein the second controller is an embedded controller.

4. The electronic device of claim 3 , wherein the embedded controller to implement at least one of a keyboard system controller and a system management controller.

5. The electronic device of claim 4 , wherein the second controller to receive a wake event based on an operation that involves the keyboard system controller or the system management controller.

6. The electronic device of claim 1 , wherein the first signal on the first signal line to cause the second controller to exit the low power mode.

7. The electronic device of claim 1 , wherein a state of the second signal to indicate a status of the data bus.

8. The electronic device of claim 1 , wherein a state of the third signal to indicate a status of the data bus.

9. The electronic device of claim 1 , wherein the data bus is a low pin count bus.

10. The electronic device of claim 1 , wherein an operating system (OS) communicates with the second controller through the first controller.

11. The electronic device of claim 1 , further comprising firmware that includes Basic Input/Output System (BIOS), and the BIOS to provide instructions to the second controller using the first signal on the first signal line between the first controller and the second controller.

12. The electronic device of claim 11 , wherein the second controller to provide instructions to the BIOS using the second signal line between the second controller and the first controller such that the electronic device exits the low power device.

13. The electronic device of claim 1 , wherein the second signal on the second signal line is based on a System Management Interrupt (SMI) signal from an external source.

14. The electronic device of claim 1 , wherein the first signal line is a unidirectional signal line from the first controller to the second controller, and the second signal line is a unidirectional signal line from the second controller to the first controller.

15. A non-transitory machine-readable medium comprising one or more instructions that when executed on a first controller or a second controller to perform one or more operations to:
provide the second controller in a low power mode;
provide a first signal along a first signal line from the first controller to the second controller to wake up the second controller from a low power mode;
provide a second signal on a second signal line from the second controller to the first controller, the second signal to provide an instruction to enter the low power mode, wherein the second signal line between the first controller and the second controller is a different signal line than the first signal line between the first controller and the second controller;
provide a third signal on the second signal line from the second controller to the first controller, the third signal to provide an instruction to exit the low power mode; and
change a state of an interface to a data bus based on the first signal from the first controller, the interface to be off when the second controller is in the low power mode, and the interface to be on when the second controller is in a normal mode.

16. The non-transitory machine-readable medium of claim 15 , wherein the embedded controller to implement at least one of a keyboard system controller and a system management controller.

17. The non-transitory machine-readable medium of claim 16 , wherein the one or more operations to further include to receive a wake event at the second controller based on an operation that includes the keyboard system controller or the system management controller.

18. The non-transitory machine-readable medium of claim 15 , wherein the first signal on the first signal line to cause the second controller to exit the low power mode.

19. The non-transitory machine-readable medium of claim 15 , wherein the first signal line is a unidirectional signal line from the first controller to the second controller, and the second signal line is a unidirectional signal line from the second controller to the first controller.

20. A method of operating an electronic device having a first controller and a second controller, comprising:
providing the second controller in a low power mode;
providing a first signal along a first signal line from the first controller to the second controller to wake up the second controller from a low power mode;
providing a second signal on a second signal line from the second controller to the first controller, the second signal to provide an instruction to enter the low power mode, wherein the second signal line between the first controller and the second controller is a different signal line than the first signal line between the first controller and the second controller;
providing a third signal on the second signal line from the second controller to the first controller, the third signal to provide an instruction to exit the low power mode; and
changing a state of an interface to a data bus based on the first signal from the first controller, the interface to be off when the second controller is in the low power mode, and the interface to be on when the second controller is in a normal mode.

21. The method of claim 20 , wherein the first signal on the first signal line to cause the second controller to exit the low power mode.

22. The method of claim 20 , further comprising providing instructions from firmware that includes Basic Input/Output System (BIOS) to the second controller using the first signal on the first signal line between the first controller and the second controller.

23. The method of claim 22 , further comprising providing instructions to the BIOS using the second signal line between the second controller and the first controller such that the electronic device exits the low power device.

24. The method of claim 20 , wherein the first signal line is a unidirectional signal line from the first controller to the second controller, and the second

Assignees

• Intel Corp

Inventors

• Gough Robert E
• Gedeon Mazen G
• Cooper Barnes
• Astekar Basavaraj B
• Dardis Sean C

Classifications

• G06F1/3253

  Power saving in bus · CPC title

• G06F1/3234 Primary

  Power saving characterised by the action undertaken · CPC title

• G06F1/3206

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• G06F13/40

  Bus structure {(for computer networks G06F15/163; for optical bus networks H04B10/25)} · CPC title

• G06F1/3293

  by switching to a less power-consuming processor, e.g. sub-CPU · CPC title