Methods and systems for operating multi-core processors

US9696771B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9696771-B2
Application numberUS-201314100483-A
CountryUS
Kind codeB2
Filing dateDec 9, 2013
Priority dateDec 17, 2012
Publication dateJul 4, 2017
Grant dateJul 4, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of operating a system on chip (SoC) includes determining to switch from a selected low-power core among a plurality of low-power cores to a high-performance core among a plurality of high-performance cores, counting the number of high-performance cores that are operating among a plurality of high-performance cores, determining a maximum operating frequency of the plurality of high-performance cores based on the counted number, and switching from the selected low-power core to the selected high-performance core based on the determined maximum operating frequency.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: determining to switch from a selected low-power core among a plurality of low-power cores to a high-performance core among a plurality of high-performance cores; counting a number of high-performance cores that are operating among the plurality of high-performance cores; determining a maximum operating frequency of the plurality of high-performance cores based on the counted number; and switching from the selected low-power core to a selected high-performance core of the plurality of high-performance cores based on the determined maximum operating frequency, wherein the switching from the selected low-power core to the selected high-performance core comprises: storing context of the selected low-power core in a memory; powering on the selected high-performance core; powering on an L2 cache of the selected high-performance core; loading the context of the selected low-power core from the memory to the selected high-performance core; and powering off the selected low-power core. 2. The method of claim 1 , wherein the determining to switch from the selected low-power core to the selected high-performance core comprises: measuring a central processing unit (CPU) load of the selected low-power core; and determining to switch from the selected low-power core to the selected high-performance core when the CPU load exceeds a threshold value. 3. The method of claim 1 , further comprising: assigning a task to the selected low-power core; measuring a central processing unit (CPU) load of the selected low-power core assigned with the task; and adjusting an operating frequency of the selected low-power core based on the CPU load of the selected low-power core. 4. The method of claim 1 , further comprising: measuring a central processing unit (CPU) load of the selected high-performance core; and switching from the selected high-performance core to a low-power core when the CPU load of the selected high-performance core is equal to or less than a threshold value. 5. The method of claim 1 , wherein the determining the maximum operating frequency comprises setting the maximum operating frequency of the selected high-performance core to a maximum value among a plurality of predetermined maximum operating frequencies when the counted number is zero. 6. The method of claim 1 , wherein the determined maximum operating frequency of the plurality of high-performance cores is in inverse proportion to the counted number. 7. The method of claim 1 , further comprising; measuring a temperature of each of the plurality of high-performance cores; and switching from the selected high-performance core to the selected low-power core based on the temperature. 8. A non-transitory computer readable recording medium for comprising an executable program which, when executed by a processor, performs the method of claim 1 .

Assignees

Inventors

Classifications

  • Cross-Sectional Technologies · mapped topic

  • where the allocation takes into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206) · CPC title

  • Cross-Sectional Technologies · mapped topic

  • by switching off individual functional units in the computer system · CPC title

  • Cross-Sectional Technologies · mapped topic

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What does patent US9696771B2 cover?
A method of operating a system on chip (SoC) includes determining to switch from a selected low-power core among a plurality of low-power cores to a high-performance core among a plurality of high-performance cores, counting the number of high-performance cores that are operating among a plurality of high-performance cores, determining a maximum operating frequency of the plurality of high-perf…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F1/206. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 04 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).