Semiconductor structure

Patent metadata

Field	Value
Publication number	US-9696488-B2
Application number	US-201514945752-A
Country	US
Kind code	B2
Filing date	Nov 19, 2015
Priority date	Nov 19, 2014
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

A semiconductor structure is provided, the semiconductor structure comprising: a semiconductor substrate processed to comprise at least an optical aspect comprising at least a silicon photonics device and at least an electronic aspect comprising at least an electronic device; at least an interlayer dielectric layer provided on the semiconductor substrate, and at least an electrically interconnecting layer provided on the interlayer dielectric layer, wherein: the semiconductor structure further comprises at least a functional-oxide crystalline layer provided in relation to the interlayer dielectric layer before the interconnecting layer is provided on the interlayer dielectric layer, the functional-oxide crystalline layer comprising at least a functional-oxide material and is processed to comprise at least an active optical device, and the interlayer dielectric layer comprises a first surface and a second surface, the first surface being in common to at least a respective part of the optical aspect and the electronic aspect.

First claim

What is claimed is:

1. A semiconductor structure comprising: a semiconductor substrate that is processed to comprise at least an optical aspect comprising at least a silicon photonics device and at least an electronic aspect comprising at least an electronic device; at least an interlayer dielectric layer that is provided on the semiconductor substrate, and at least an electrically interconnecting layer that is provided on the interlayer dielectric layer, wherein: the semiconductor structure further comprises at least a functional-oxide crystalline layer that is provided in relation to the interlayer dielectric layer before the interconnecting layer is provided on the interlayer dielectric layer, the functional-oxide crystalline layer comprising at least a functional-oxide material and is processed to comprise at least an active optical device having a given electro-optical property, and the interlayer dielectric layer comprises at least two surfaces, a first surface and a second surface, the first surface being provided substantially adjacent with the semiconductor substrate thereby to be in common to at least a respective part of the optical aspect and the electronic aspect, and wherein the functional-oxide crystalline layer is provided in relation to the first surface of the interlayer dielectric layer adjacent with the semiconductor substrate.

2. The semiconductor structure as claimed in claim 1 wherein the functional-oxide crystalline layer is provided in relation to at least one of the first and second surfaces of the interlayer dielectric layer.

3. The semiconductor structure as claimed in claim 1 wherein the functional-oxide crystalline layer is provided on the second surface of the interlayer dielectric layer that is adjacent to the interconnecting layer.

4. The semiconductor structure as claimed in claim 3 wherein the functional-oxide crystalline layer is provided in a stacked structure that is wafer-bonded onto the second surface of the interlayer dielectric layer, and wherein the stacked structure comprises a silicon dioxide layer, a barium titanate layer, and a silicon donor wafer layer.

5. The semiconductor structure as claimed in claim 1 wherein the functional-oxide crystalline layer is integrated within the interlayer dielectric layer thereby to be provided substantially in contact with one of: at least a crystalline surface of the semiconductor substrate and at least the optical aspect of the semiconductor substrate.

6. The semiconductor structure as claimed in claim 1 wherein the interconnecting layer is processed to comprise at least a passive device configurable to electrically connect at least the active optical device of the functional-oxide crystalline layer to at least a given part of the semiconductor substrate.

7. The semiconductor structure as claimed in claim 1 wherein the functional-oxide crystalline layer comprises one of: a crystalline layer, a polycrystalline layer, a heterostructure, and a superlattice.

8. The semiconductor structure as claimed in claim 1 configurable to modify the given electro-optical property of the functional-oxide material with a given externally-applied stimulus, wherein the functional-oxide crystalline layer is provided in relation to the interlayer dielectric layer so that the given electro-optical property is enhanced as desired.

9. The semiconductor structure as claimed in claim 1 wherein the interlayer dielectric layer has a surface roughness of up to 1 nm.

10. The semiconductor structure as claimed in claim 1 wherein the functional-oxide material comprises at least a perovskite.

11. The semiconductor structure as claimed in claim 1 wherein the functional-oxide crystalline layer comprises at least a barium titanate layer.

12. A method for fabricating a semiconductor structure comprising: providing a semiconductor substrate that is processed to comprise at least an optical aspect that comprises at least a silicon photonics device and at least an electronic aspect comprising at least an electronic device; forming at least an interlayer dielectric layer on the semiconductor substrate, and forming at least an electrically interconnecting layer on the interlayer dielectric layer, wherein the method further comprises: providing at least a functional-oxide crystalline layer in relation to the interlayer dielectric layer before the interconnecting layer is formed on the interlayer dielectric layer, the functional-oxide crystalline layer comprising a functional-oxide material and being processed to comprise at least an active optical device having at least a given electro-optical property, and in forming the interlayer dielectric layer, the interlayer dielectric layer is formed thereby to comprise at least two surfaces, a first surface and a second surface, the first surface being provided substantially adjacent with the semiconductor substrate so as to be in common to at least a respective part of the optical aspect and the electronic aspect, wherein the method further comprises: providing the functional-oxide crystalline layer in relation to the first surface of the interlayer dielectric layer adjacent with the semiconductor substrate, wherein the functional-oxide crystalline layer is integrated within the interlayer dielectric layer so that it is provided substantially in contact with one of: at least a crystalline surface of the semiconductor substrate and at least the optical aspect of the semiconductor substrate.

13. The method as claimed in claim 12 wherein providing the functional-oxide crystalline layer is done in a temporal window substantially between forming the interlayer dielectric layer and forming the interconnecting layer.

14. The method as claimed in claim 12 further comprising: providing the functional-oxide crystalline layer on the second surface of the interlayer dielectric layer that is adjacent to the interconnecting layer.

15. The method as claimed in claim 14 further comprising: providing the functional-oxide crystalline layer in a stacked structure; wafer-bonding the stacked structure onto the second surface of the interlayer dielectric layer; and removing at least a part of the stacked structure after the stacked structure is wafer-bonded to the second surface of the interlayer dielectric layer.

16. The method as claimed in claim 12 wherein the interconnecting layer is processed at a temperature of <450° C. thereby to comprise at least a passive device configurable to electrically connect at least the active optical device of the functional-oxide crystalline layer to at least a given part of the semiconductor substrate.

17. The method as claimed in claim 12 further comprising: optically connecting at least the active optical device of the functional-oxide crystalline layer to a given part of the semiconductor substrate with at least a given optical coupling technique.

18. The method as claimed in claim 12 further comprising: processing the semiconductor substrate at a temperature of 700° C. to 1100° C. thereby to comprise at least one of the electronic aspect and optical aspect.

Assignees

• IBM

Inventors

• Abel Stefan
• Fompeyrine Jean
• Marchiori Chiara

Classifications

• H10D84/01

  Manufacture or treatment · CPC title

• G02B2006/12142

  Modulator · CPC title

• G02B2006/12047

  Barium titanate (BaTiO3) · CPC title

• G02F1/035

  in an optical waveguide structure · CPC title

• G02B6/122 Primary

  Basic optical elements, e.g. light-guiding paths · CPC title