Analog-to-digital converting device and method of operating analog-to-digital converting device

Patent metadata

Field	Value
Publication number	US-9692437-B2
Application number	US-201615083096-A
Country	US
Kind code	B2
Filing date	Mar 28, 2016
Priority date	May 13, 2015
Publication date	Jun 27, 2017
Grant date	Jun 27, 2017

Abstract

Provided is an analog-to-digital converting device. The analog-to-digital converting device may include a determination circuit that determination whether a reference digital signal or a determination digital signal obtained by conversion of a reference voltage or a determination voltage matches a test pattern for the reference voltage, and it is possible to monitor whether the analog-to-digital converting device normally operates, according to whether there is matching.

First claim

What is claimed is:

1. An analog-to-digital converting device comprising:
a reference voltage generation circuit configured to generate a reference voltage;
a signal selection circuit configured to output analog input signals received from an input circuit and the reference voltage generated from the reference voltage generation circuit, in response to a selection signal;
an analog-to-digital (AD) conversion circuit configured to convert an output signal from the signal selection circuit into a digital signal; and
a determination circuit configured to compare a reference digital signal obtained by conversion of the reference voltage with a test pattern for the reference voltage in order to determine whether the reference digital signal matches the test pattern.

2. The analog-to-digital converting device of claim 1 , wherein the reference voltage generation circuit is configured to generate a first reference voltage and a second reference voltage in a first operation mode.

3. The analog-to-digital converting device of claim 2 , wherein the signal selection circuit is configured to output the first reference voltage, sequentially output the analog input signals, and then output the second reference voltage.

4. The analog-to-digital converting device of claim 2 , wherein the determination circuit is configured to compare a first reference digital signal obtained by conversion of the first reference voltage with a first test pattern for the first reference voltage, output digital signals obtained by conversion of the analog input signals in a case where as a result of the comparison, there is matching, and output an error signal in a case where as a result of the comparison, there is mismatching.

5. The analog-to-digital converting device of claim 4 , further comprising an output circuit configured to store the digital signals obtained by the conversion of the analog input signals,
wherein the determination circuit is configured to compare a second reference digital signal obtained by conversion of the second reference voltage with a second test pattern for the second reference voltage, request to output the digital signals stored in the output circuit in a case where as a result of the comparison, there is matching, and request to neglect the digital signals stored in the output circuit in a case where as a result of the comparison, there is mismatching.

6. The analog-to-digital converting device of claim 2 , further comprising a determination voltage generation circuit that is configured to generate a first determination voltage and a second determination voltage in a second operation mode.

7. The analog-to-digital converting device of claim 6 , wherein the signal selection circuit is configured to output the first determination voltage, sequentially output the received analog input signals, and then output the second determination voltage, in the second operation mode.

8. The analog-to-digital converting device of claim 6 , further comprising an output circuit configured to store digital signals obtained by conversion of the analog input signals,
wherein the determination circuit is configured to compare first and second determination digital signals obtained by conversion of the first and second determination voltages with first and second test patterns for the first and second reference voltages, respectively and request to neglect the digital signals stored in the output circuit in a case where as a result of the comparison, there is at least one matching.

9. The analog-to-digital converting device of claim 6 , wherein the determination circuit is configured to compare some of first and second determination digital signals obtained by conversion of the first and second determination voltages with some of first and second test patterns for the first and second reference voltages, respectively to determine whether there is matching.

10. The analog-to-digital converting device of claim 1 , wherein the determination circuit is configured to compare a part of the reference digital signal obtained by conversion of the reference voltage with a part of the test pattern for the reference voltage.

11. An operating method of an analog-to-digital converting device, the operating method comprising:
converting a reference voltage into a reference digital signal by the analog-to-digital converging device;
comparing the reference digital signal with a test pattern by the analog-to-digital converging device; and
converting analog signals received from an external device into digital signals and outputting the digital signals by the analog-to-digital converging device, when a part of the reference digital signal matches at least a part of the test pattern.

12. An operating method of an analog-to-digital converting device, the operating method comprising:
converting a determination voltage into a determination digital signal by the analog-to-digital converging device;
comparing the determination digital signal with a test pattern by the analog-to-digital converging device; and
determining that the determination does not normally operate, when a part of the a part of the reference digital signal matches at least a part of the test pattern digital signal matches at least a part of the test pattern.

Assignees

• Electronics & Telecommunications Res Inst

Inventors

• Jeon Young-Deuk
• Cho Min-Hyung
• Kim Yi-Gyeong
• Lyuh Chun-Gi

Classifications

• H03M1/109 Primary

  for DC performance, i.e. static testing (H03M1/1085 takes precedence) · CPC title

• H03M1/12

  Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title