Voltage regulator with load compensation

Patent metadata

Field	Value
Publication number	US-9692433-B2
Application number	US-201615227184-A
Country	US
Kind code	B2
Filing date	Aug 3, 2016
Priority date	Sep 10, 2014
Publication date	Jun 27, 2017
Grant date	Jun 27, 2017

Abstract

A voltage regulation system provides a relatively stable voltage source without introducing the typical costs of a ground buffer. The disclosed voltage regulation system includes a voltage regulator that is operative to detect a change of the load current and regulate a current bypass mechanism to stabilize a total supply current. For example, the voltage regulator includes a current sensor and a current compensation circuit. The current sensor is configure to generate a current compensation signal based on the load current change, whereas the current compensation circuit is configured to adjust a bypass current in response to the current compensation signal. As a result, the bypass current dynamically compensates the load current change such that the ground voltage of a variable load becomes relatively stable over a range of load currents.

First claim

What is claimed is:

1. A voltage regulation device, comprising:
first and second output nodes;
a current compensation circuit including:
a current input node coupled to the first output node;
a current output node coupled to the second output node; and
a control terminal; and

a current sensor circuit including:
a supply current path having a supply output node coupled to the first output node and the current input node; and
a monitoring current path having a monitoring output node coupled to the control terminal.

2. The voltage regulation device of claim 1 , wherein:
the supply current path includes a first p-channel transistor arranged along a feedback path originating from the first output node and positioned upstream of the current output node; and
the monitoring current path includes a second p-channel transistor arranged along the feedback path originating from the first output node and positioned upstream of the monitoring output node.

3. The voltage regulation device of claim 2 , wherein the monitoring current path includes:
a resistor coupled with the second p-channel transistor at a set node; and
a comparison circuit having:
a first input coupled to the set node;
a second input; and
a comparison output coupled to the monitoring output node.

4. The voltage regulation device of claim 3 , wherein the current compensation circuit includes an n-channel transistor having:
a drain node coupled to the current input node;
a gate node coupled to the control terminal; and
a source node coupled to the current output node.

5. The voltage regulation device of claim 2 , wherein the monitoring current path includes:
a current source coupled to the second p-channel transistor at the monitoring output node.

6. The voltage regulation device of claim 5 , wherein the current compensation circuit includes an p-channel transistor having:
a source node coupled to the current input node;
a gate node coupled to the control terminal; and
a drain node coupled to the current output node.

7. A voltage regulation circuit, comprising:
first and second output nodes;
a current compensation circuit including:
a current input node coupled to the first output node;
a current output node coupled to the second output node; and
a control terminal; and

a current sensor circuit including:
a first sensing stage establishing a feedback path with the first output node; and
a second sensing stage having an input coupled to the first sensing stage, and an output coupled to the control terminal of the current compensation circuit.

8. The voltage regulation circuit of claim 7 , wherein the first sensing stage includes:
a comparison circuit having an output lead, a positive input lead, and a negative input lead coupled with the first output node to establish the feedback path; and
a resistor coupled in series between the output lead and the first output node.

9. The voltage regulation circuit of claim 7 , wherein the second sensing stage includes:
a comparison circuit having a negative input lead of the input coupled to the first sensing stage, a positive input lead of the input, and an output lead of the output coupled to the control terminal of the current compensation circuit.

10. The voltage regulation circuit of claim 7 , wherein the current compensation circuit includes an n-channel transistor having:
a drain node coupled to the current input node;
a gate node coupled to the control terminal; and
a source node coupled to the current output node.

11. A digital-to-analog conversion (DAC) system, comprising:
a variable resistance network having first and second reference nodes, and a load positioned therebetween and adjustable based on a digital code;
a current compensation circuit including:
a current input node coupled to the first output node;
a current output node coupled to the second output node; and
a control terminal; and

a current sensor circuit establishing a feedback path with the first reference node, and having an output coupled to the control terminal.

12. The DAC system of claim 11 , wherein the current sensor circuit includes:
a supply current path having a supply output node coupled to the first reference node and the current input node; and
a monitoring current path having a monitoring output node coupled to the control terminal of the current compensation circuit.

13. The DAC system of claim 12 , wherein:
the supply current path includes a first p-channel transistor arranged along the feedback path originating from the first reference node and positioned upstream of the current output node; and
the monitoring current path includes a second p-channel transistor arranged along the feedback path originating from the first reference node and positioned upstream of the monitoring output node.

14. The DAC system of claim 13 , wherein the monitoring current path includes:
a resistor coupled with the second p-channel transistor at a set node; and
a comparison circuit having:
a first input coupled to the set node;
a second input; and
a comparison output coupled to the monitoring output node.

15. The DAC system of claim 14 , wherein the current compensation circuit includes an n-channel transistor having:
a drain node coupled to the current input node;
a gate node coupled to the control terminal; and
a source node coupled to the current output node.

16. The DAC system of claim 13 , wherein the monitoring current path includes:
a current source coupled to the second p-channel transistor at the monitoring output node.

17. The DAC system of claim 16 , wherein the current compensation circuit includes an p-channel transistor having:
a source node coupled to the current input node;
a gate node coupled to the control terminal; and
a drain node coupled to the current output node.

18. The DAC system of claim 11 , wherein the current sensor circuit includes:
a first sensing stage establishing the feedback path with the first reference node; and
a second sensing stage having an input coupled to the first sensing stage, and the output coupled to the control terminal of the current compensation circuit.

19. The DAC system of claim 18 , wherein the first sensing stage includes:
a comparison circuit having an output lead, a positive input lead, and a negative input lead coupled with the first reference node to establish the feedback path; and
a resistor coupled in series between the output lead and the first reference node.

20. The DAC system of claim 18 , wherein the second sensing stage includes:
a comparison circuit having a negative input lead of the input coupled to the first sensing stage, a positive input lead of the input, and an output lead of the output coupled to the control terminal of the current compensation circuit.

Assignees

• Texas Instruments Inc

Inventors

• Shill Mark Allan
• Wang Binan

Classifications

• H03M1/66

  Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/06 Primary

  Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, {e.g. by using stored correction values,} H03M1/10) · CPC title

• G05F3/30

  Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) · CPC title

• G05F3/262 Primary

  using field-effect transistors only · CPC title

• H03M1/785

  using resistors, i.e. R-2R ladders · CPC title