Dc motor comprising accelerator and energy storage ring
US-2024178772-A1 · May 30, 2024 · US
US9692330B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9692330-B2 |
| Application number | US-201514721128-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 26, 2015 |
| Priority date | May 30, 2014 |
| Publication date | Jun 27, 2017 |
| Grant date | Jun 27, 2017 |
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Official abstract text for this publication.
The present invention provides a motor driving device without an additional signal line for identifying whether a motor rotates stably. The motor driving device ( 21 ) includes a control circuit ( 100 ) for receiving an acceleration signal (SU) and a deceleration signal (SD), and generating a driver control signal (S 10 ); a driving circuit ( 200 ) for generating a motor driving signal (S 3 ) according to the driver control signal (S 10 ); and a phase-locked identifying circuit ( 500 ) for monitoring an input mode of the acceleration signal (SU) and the deceleration signal (SD), and identifying whether the motor rotation speed is stable at the desired target rotation speed.
Opening claim text (preview).
What is claimed is: 1. A motor driving device, comprising: a control circuit for receiving an acceleration signal and a deceleration signal, and generating a driver control signal; a driving circuit for generating a motor driving signal according to the driver control signal; and a phase-locked identifying circuit for monitoring an input mode of the acceleration signal and the deceleration signal, and identifying whether a motor rotation speed is stable at a desired target rotation speed, wherein in order to monitor the input mode, the phase-locked identifying circuit respectively counts a number of successive assertion times of the acceleration signal and a number of successive assertion times of the deceleration signal. 2. The motor driving device of claim 1 , wherein after the phase-locked identifying circuit continuously detects a pulse edge of the acceleration signal for “x” times, continuously detects a pulse edge of the deceleration signal for “y” times and then continuously detects the pulse edge of the acceleration signal for “z” times, the phase-locked identifying circuit determines that the motor rotation speed achieves the target rotation speed, and the phase-locked identifying signal is switched to a logical value indicating a locked phase. 3. The motor driving device of claim 2 , wherein after the phase-locked identifying circuit determines that the motor rotation speed achieves the target rotation speed, the phase-locked identifying signal is switched to the logical value indicating the locked phase after predetermined delay time. 4. The motor driving device of claim 2 , wherein after the phase-locked identifying circuit determines that the motor rotation speed achieves the target rotation speed, the phase-locked identifying signal is switched to the logical value indicating the locked phase after it is determined that a motor rotation speed signal is stable. 5. The motor driving device of claim 2 , wherein after the phase-locked identifying circuit switches the phase-locked identifying signal to the logical value indicating the locked phase, when the pulse edge of the acceleration signal or the deceleration signal is continuously detected for “a” times, the phase-locked identifying circuit determines that the motor rotation speed deviates the target rotation speed, and switches the phase-locked identifying signal to a logical value indicating a lock-released phase. 6. A semiconductor device, comprising the motor driving device of claim 1 . 7. An electronic apparatus, comprising: the semiconductor device of claim 6 ; a digital signal processor for generating a target rotation speed signal; a PLL (phase locked loop) circuit for generating an acceleration signal and a deceleration signal to the semiconductor device by performing a phase synchronization control of the target rotation speed signal input from the digital signal processor and a motor rotation speed signal input from the semiconductor device; and a motor driven by the semiconductor device. 8. The electronic apparatus of claim 7 , further comprising: a first circuit board for carrying the digital signal processor and the PLL circuit; and a second circuit board for carrying the semiconductor device and the motor. 9. The electronic apparatus of claim 7 , wherein the motor is a sensorless motor.
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