Interposers with circuit modules encapsulated by moldable material in a cavity, and methods of fabrication

US9691696B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9691696-B2
Application numberUS-201615005220-A
CountryUS
Kind codeB2
Filing dateJan 25, 2016
Priority dateMar 12, 2014
Publication dateJun 27, 2017
Grant dateJun 27, 2017

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Stacked dies ( 110 ) are encapsulated in an interposer's cavity ( 304 ) by multiple encapsulant layers ( 524 ) formed of moldable material. Conductive paths ( 520, 620.3 ) connect the dies to the cavity's bottom wall ( 304 B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole ( 514 ) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.

First claim

Opening claim text (preview).

The invention claimed is: 1. An assembly comprising: a substrate whose top side comprises a cavity comprising a bottom wall; one or more contact pads under the bottom wall; a plurality of levels overlying one another in the cavity, each level comprising one or more dies laterally encapsulated by an encapsulant layer made of cured resin at least partially cured separately from the encapsulant layer of any other level; and electrically conductive wiring passing through a plurality of the encapsulant layers and through the bottom wall to connect one or more of the dies to the one or more contact pads under the bottom wall, the electrically conductive wiring connecting at least one die overlying more than one of the encapsulant layers to at least one contact pad under the bottom wall. 2. The assembly of claim 1 wherein the one or more contact pads under the bottom wall are part of a redistribution layer formed on a bottom surface of the substrate. 3. The assembly of claim 1 wherein the electrically conductive wiring comprises a plurality of vertical segments each of which passes through a respective one of the encapsulant layers and is electrically connected, by the electrically conductive wiring, to the at least one die and to the at least one contact pad. 4. The assembly of claim 3 wherein the electrically conductive wiring comprises, at a top of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment. 5. The assembly of claim 3 wherein the electrically conductive wiring comprises, at a bottom of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment. 6. The assembly of claim 3 wherein the electrically conductive wiring comprises a conductive path comprising a non-vertical line and interconnecting two of the vertical segments passing through the respective encapsulant layers adjacent to each other. 7. The assembly of claim 1 wherein each encapsulant layer does not have any separately cured sub-layers. 8. The assembly of claim 1 , comprising one or more contact pads on top of the plurality of levels, for connection to structures external to the assembly. 9. The assembly of claim 1 wherein in least one level, at least one die is part of a multi-chip module contained by the level. 10. The assembly of claim 1 wherein each level comprises at least one die whose top surface is coplanar with the encapsulant layer of the level. 11. An assembly comprising: a substrate whose top side comprises a cavity comprising a bottom wall; one or more contact pads under the bottom wall; a plurality of levels overlying one another in the cavity, each level comprising one or more dies laterally encapsulated by an encapsulant layer comprising organic polymer; and electrically conductive wiring passing through a plurality of the encapsulant layers and through the bottom wall to connect one or more of the dies to the one or more contact pads under the bottom wall, the electrically conductive wiring connecting at least one die overlying more than one of the encapsulant layers to at least one contact pad under the bottom wall; wherein the electrically conductive wiring comprises a plurality of vertical segments each of which passes through a respective one of the encapsulant layers and is electrically connected, by the electrically conductive wiring, to the at least one die and to the at least one contact pad; and wherein the electrically conductive wiring comprises, at a top of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment. 12. The assembly of claim 11 wherein the electrically conductive wiring comprises, at a bottom of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment. 13. The assembly of claim 11 wherein the electrically conductive wiring comprises a conductive path comprising a non-vertical line and interconnecting two of the vertical segments passing through the respective encapsulant layers adjacent to each other. 14. The assembly of claim 11 wherein the one or more contact pads under the bottom wall are part of a redistribution layer formed on a bottom surface of the substrate. 15. The assembly of claim 11 , comprising one or more contact pads on top of the plurality of levels, for connection to structures external to the assembly. 16. The assembly of claim 11 wherein in least one level, at least one die is part of a multi-chip module contained by the level. 17. The assembly of claim 11 wherein each level comprises at least one die whose top surface is coplanar with the encapsulant layer of the level. 18. An assembly comprising: a substrate whose top side comprises a cavity comprising a bottom wall; one or more contact pads under the bottom wall; a plurality of levels overlying one another in the cavity, each level comprising one or more dies laterally encapsulated by an encapsulant layer comprising organic polymer; and electrically conductive wiring passing through a plurality of the encapsulant layers and through the bottom wall to connect one or more of the dies to the one or more contact pads under the bottom wall, the electrically conductive wiring connecting at least one die overlying more than one of the encapsulant layers to at least one contact pad under the bottom wall; wherein the electrically conductive wiring comprises a plurality of vertical segments each of which passes through a respective one of the encapsulant layers and is electrically connected, by the electrically conductive wiring, to the at least one die and to the at least one contact pad; and wherein the electrically conductive wiring comprises, at a bottom of each vertical segment, a contact pad physically contacting the vertical segment and the encapsulant layer through which the vertical segment passes, the contact pad being wider than the vertical segment. 19. The assembly of claim 18 wherein the electrically conductive wiring comprises a conductive path comprising a non-vertical line and interconnecting two of the vertical segments passing through the respective encapsulant layers adjacent to each other. 20. The assembly of claim 18 wherein each level comprises at least one die whose top surface is coplanar with the encapsulant layer of the level.

Assignees

Inventors

Classifications

  • Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

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Frequently asked questions

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What does patent US9691696B2 cover?
Stacked dies ( 110 ) are encapsulated in an interposer's cavity ( 304 ) by multiple encapsulant layers ( 524 ) formed of moldable material. Conductive paths ( 520, 620.3 ) connect the dies to the cavity's bottom wall ( 304 B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through…
Who is the assignee on this patent?
Invensas Corp
What technology area does this patent fall under?
Primary CPC classification H10W76/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 27 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).