Power module semiconductor device

US9691673B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9691673-B2
Application numberUS-201514829026-A
CountryUS
Kind codeB2
Filing dateAug 18, 2015
Priority dateMay 15, 2012
Publication dateJun 27, 2017
Grant dateJun 27, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

There is provided a power module semiconductor device allowing reduction in size and weight of a thin type SiC power module. The power module semiconductor device includes: a ceramic substrate; a first pattern of a first copper plate layer disposed on a surface of the ceramic substrate; a first semiconductor chip disposed on the first pattern; a first pillar connection electrode disposed on the first pattern; and an output terminal connected to the first pillar connection electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A power module semiconductor device comprising: a ceramic substrate; a first pattern of a first copper plate layer disposed on a surface of the ceramic substrate; a first semiconductor chip disposed on the first pattern; a first pillar electrode disposed on the first semiconductor chip; a first upper surface plate electrode disposed on the first pillar electrode, wherein a plurality of grooves are formed on a surface of the first upper surface plate electrode. 2. The power module semiconductor device according to claim 1 , wherein the grooves are guide grooves for guiding the transfermold resin injected into a gap with a jig set so as to cover an outside of the power module semiconductor device, at the time of covering the whole power module semiconductor device with the transfermold resin. 3. The power module semiconductor device according to claim 2 , wherein the guide grooves include stripe-shaped first grooves formed along an injecting direction of the transfermold resin. 4. The power module semiconductor device according to claim 3 , wherein the guide grooves include second grooves for diffusion configured to diffuse the injected transfermold resin in multiple directions, the guide grooves configured to intersect the stripe-shaped first grooves. 5. The power module semiconductor device according to claim 1 , wherein a projecting portion extended in a direction away from the first upper surface plate electrode is formed on an another side surface of the first upper surface plate electrode. 6. The power module semiconductor device according to claim 1 , wherein the grooves also function as a heat sink at the time of operating the power module semiconductor device. 7. The power module semiconductor device according to claim 6 , wherein the groove includes one of a wall and a convexity portion upright adjacent to the groove, and at least a part of the wall or the convexity portion is exposed to outside from the transfermold resin. 8. The power module semiconductor device according to claim 1 , further comprising: a second semiconductor chip disposed on a third pattern of the first copper plate layer; a second diode disposed on the first pattern so as to be adjacent to the second semiconductor chip; a second pillar electrode disposed on the second semiconductor chip; and a second upper surface plate electrode disposed on the second pillar electrode, the second upper surface plate electrode connected to an anode electrode of the second diode, wherein a plurality of grooves are formed on a surface of the second upper surface plate electrode. 9. The power module semiconductor device according to claim 1 , further comprising: a first pillar connection electrode disposed on the first pattern; and an output terminal connected to the first pillar connection electrode. 10. The power module semiconductor device according to claim 1 , wherein the first upper surface plate electrode connected to an anode electrode of the first diode. 11. The power module semiconductor device according to claim 8 , wherein a projecting portion extended in a direction away from the second upper surface plate electrode is formed on an another side surface of the second upper surface plate electrode. 12. The power module semiconductor device according to claim 1 , wherein a cross-sectional shape of the grooves is a rectangular shape. 13. The power module semiconductor device according to claim 1 , wherein a cross-sectional shape of the grooves is a shape serially forming a ridge shape and a valley shape one another. 14. The power module semiconductor device according to claim 4 , wherein the second grooves configured to be orthogonal to the stripe-shaped first grooves. 15. The power module semiconductor device according to claim 1 , wherein a thickness of the first upper surface plate electrode is 2 mm, a pitch width of the grooves is from 1 mm to 2 mm, and a depth of the grooves is from 1 mm to 1.5 mm. 16. The power module semiconductor device according to claim 8 , wherein a thickness of the second upper surface plate electrode is 2 mm, a pitch width of the grooves is from 1 mm to 2 mm, and a depth of the grooves is from 1 mm to 1.5 mm. 17. The power module semiconductor device according to claim 1 , wherein a thickness of the first upper surface plate electrode is equal to or greater than 2 mm, and a depth of the grooves is equal to or greater than 1.5 mm. 18. The power module semiconductor device according to claim 8 , wherein a thickness of the second upper surface plate electrode is equal to or greater than 2 mm, and a depth of the grooves is equal to or greater than 1.5 mm.

Assignees

Inventors

Classifications

  • between laterally-adjacent chips · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Bond wires and strap connectors · CPC title

  • multiple bond wires connected to a common bond pad · CPC title

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Frequently asked questions

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What does patent US9691673B2 cover?
There is provided a power module semiconductor device allowing reduction in size and weight of a thin type SiC power module. The power module semiconductor device includes: a ceramic substrate; a first pattern of a first copper plate layer disposed on a surface of the ceramic substrate; a first semiconductor chip disposed on the first pattern; a first pillar connection electrode disposed on the…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 27 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).