Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium

Patent metadata

Field	Value
Publication number	US-9691609-B2
Application number	US-201615368337-A
Country	US
Kind code	B2
Filing date	Dec 2, 2016
Priority date	Nov 19, 2014
Publication date	Jun 27, 2017
Grant date	Jun 27, 2017

Abstract

A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising:
alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, whereby a first seed layer as an epitaxial silicon layer is formed on the monocrystalline silicon and a second seed layer differing in crystal structure from the first seed layer is formed on the insulation film; and
supplying a third process gas containing silicon to the substrate, whereby a first silicon film is epitaxially grown on the first seed layer and a second silicon film differing in crystal structure from the first silicon film is grown on the second seed layer.

2. The method of claim 1 , wherein the first seed layer and the second seed layer are formed in parallel.

3. The method of claim 1 , wherein the first silicon film and the second silicon film are grown in parallel.

4. The method of claim 1 , wherein a recess is formed on the surface of the substrate, the recess including a bottom portion formed of the monocrystalline silicon and a side portion formed of the insulation film.

5. The method of claim 4 , wherein a top portion of the first silicon film is covered with the second silicon film grown from the side portion of the recess, so as to stop epitaxial growth of the first silicon film.

6. The method of claim 4 , wherein a top portion of the first silicon film is covered with the second silicon film grown from the side portion of the recess, so as to form a laminated structure including the first silicon film and the second silicon film laminated on the first silicon film.

7. The method of claim 1 , wherein a crystal structure of the second silicon film is an amorphous, a polycrystal or a mixture of the amorphous and the polycrystal.

8. The method of claim 1 , wherein the first process gas includes silane chloride, the second process gas includes hydrogenated silane, and the third process gas includes hydrogenated silane.

9. The method of claim 1 , wherein in the act of supplying the third process gas, a dopant gas together with the third process gas is supplied to the substrate.

10. The method of claim 1 , wherein the second process gas differs in molecular structure from the third process gas.

11. The method of claim 1 , wherein a pyrolysis temperature of the second process gas is lower than a pyrolysis temperature of the third process gas.

12. The method of claim 1 , wherein the second process gas is identical in molecular structure with the third process gas.

13. The method of claim 1 , further comprising thermally treating the first silicon film and the second silicon film.

14. The method of claim 13 , wherein in the act of thermally treating the first silicon film and the second silicon film, a portion of the second silicon film which makes contact with the first silicon film is changed into an epitaxial silicon film.

15. The method of claim 13 , wherein in the act of thermally treating the first silicon film and the second silicon film, a region occupied by the first silicon film is expanded.

16. The method of claim 1 , wherein in the act of alternately performing the act of supplying the first process gas and the act of supplying the second process gas, a temperature of the substrate is set at a first temperature, and
in the act of supplying the third process gas, a temperature of the substrate is set at a second temperature equal to or higher than the first temperature.

17. The method of claim 16 , further comprising thermally treating the first silicon film and the second silicon film,
wherein in the act of thermally treating the first silicon film and the second silicon film, a temperature of the substrate is set at a third temperature equal to or higher than the second temperature.

18. The method of claim 1 , wherein the semiconductor device includes a three-dimensional flash memory or a dynamic random access memory.

19. A substrate processing apparatus, comprising:
a process chamber configured to accommodate a substrate therein;
a first process gas supply system configured to supply a first process gas containing silicon and a halogen element to the substrate existing within the process chamber;
a second process gas supply system configured to supply a second process gas containing silicon and not containing a halogen element to the substrate existing within the process chamber;
a third process gas supply system configured to supply a third process gas containing silicon to the substrate existing within the process chamber;
a heater configured to heat the substrate existing within the process chamber; and
a control part configured to control the first process gas supply system, the second process gas supply system, the third process gas supply system and the heater so as to perform processes of:
alternately performing supplying the first process gas to the substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying the second process gas to the substrate, whereby a first seed layer as an epitaxial silicon layer is formed on the monocrystalline silicon and a second seed layer differing in crystal structure from the first seed layer is formed on the insulation film; and
supplying the third process gas to the substrate, whereby a first silicon film is epitaxially grown on the first seed layer and a second silicon film differing in crystal structure from the first silicon film is grown on the second seed layer.

20. A non-transitory computer-readable recording medium storing a program that causes a substrate processing apparatus, by a computer, to perform processes of:
alternately performing supplying a first process gas containing silicon and a halogen element to a substrate existing within a process chamber of the substrate processing apparatus, the substrate having a surface on which monocrystalline silicon and an insulation film are exposed, and supplying a second process gas containing silicon and not containing a halogen element to the substrate existing within the process chamber, whereby a first seed layer as an epitaxial silicon layer is formed on the monocrystalline silicon and a second seed layer differing in crystal structure from the first seed layer is formed on the insulation film; and
supplying a third process gas containing silicon to the substrate existing within the process chamber, whereby a first silicon film is epitaxially grown on the first seed layer and a second silicon film differing in crystal structure from the first silicon film is grown on the second seed layer.

Assignees

• Hitachi Int Electric Inc

Inventors

• Moriya Atsushi
• Nakaiso Naoharu
• Orihashi Yugo
• Murakami Kotaro

Classifications

• H10P72/0436

  mainly by radiation · CPC title

• H10P72/0432

  mainly by conduction · CPC title

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P14/3822

  Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing · CPC title

• H10P14/3458

  Monocrystalline · CPC title