Camera control interface extension with in-band interrupt

Patent metadata

Field	Value
Publication number	US-9690725-B2
Application number	US-201514595030-A
Country	US
Kind code	B2
Filing date	Jan 12, 2015
Priority date	Jan 14, 2014
Publication date	Jun 27, 2017
Grant date	Jun 27, 2017

Abstract

Master and slave devices may be coupled to a control data bus. A method includes controlling data transmissions over a bus from a master device, where data bits are transcoded into symbols for transmission across two lines of the bus and a clock signal is embedded within symbol transitions of the data transmissions, and providing an interrupt period, during which one or more slave devices coupled to the bus can assert an interrupt request on a first line of the bus, within part of a heartbeat transmission by the master device over the first line and a second tine of the bus. The interrupt request may be an indicator that the asserting slave device wishes to request some action by the master device.

First claim

What is claimed is:

1. A method operational on a master device, comprising:
controlling data transmissions over a bus coupling the master device and one or more slave devices, wherein data bits are transcoded into symbols for transmission across two lines of the bus and a clock signal is embedded within symbol transitions of the data transmissions; and
monitoring the bus during an interrupt period associated with transmission of a first signaling condition by the master device over a first line and a second line of the bus, wherein the one or more slave devices are enabled to assert an interrupt request using the first line of the bus in response to the transmission of the first signaling condition, and
wherein the one or more slave devices are adapted to assert an interrupt request by pulling down the first line during the interrupt period.

2. The method of claim 1 , wherein the first signaling condition is produced by transmission of a heartbeat word that is selected from a set of twenty-bit words that have a most significant bit set to a first logic value, wherein payload data transmitted between the master device and the one or more slave devices comprises twenty-bit words that have the most significant bit set to a second logic level, and wherein the transmission of the heartbeat word produces a pulse on a receive clock generated from signaling state of the first line and the second line.

3. The method of claim 2 , wherein the one or more slave devices are adapted to assert an interrupt request by transmitting a response word on the first line or a second line of the bus, and wherein the response word differs from the heartbeat word by one bit and has a most significant bit identical to a most significant bit of the heartbeat word.

4. The method of claim 1 , further comprising:
scanning the one or more slave devices over the bus to identify a slave device asserting the interrupt request.

5. The method of claim 4 , further comprising:
receiving an indicator over the first line from the slave device asserting the interrupt request.

6. The method of claim 1 , wherein the one or more slave devices are adapted to internally mask the first line during the interrupt period for purposes of decoding transcoded data bits received from the bus.

7. The method of claim 1 , further comprising:
providing a slave identifier scan response period, during which one or more slave devices coupled to the bus can provide their unique identifier over a first line of the bus, within part of a slave identifier scan initiated by the master device over the first line and a second line of the bus.

8. The method of claim 7 , wherein each of the one or more slave devices is configured to mask the first line after detecting transmission of the first signaling condition.

9. The method of claim 7 , wherein providing a slave identifier scan response period comprises:
transmitting a general call on the bus, wherein each of the one or more slave devices is configured to mask the first line when transmitting a response after the general call has been transmitted on the bus.

10. The method of claim 1 , further comprising:
defining a data read period in which a previously identified slave device is allowed to transmit data over a first line of the bus while the master device sends a global read clock over a second line of the bus.

11. The method of claim 10 , wherein the global read clock is a double data rate clock.

12. A device, comprising:
a bus including a first line and a second line;
one or more slave devices coupled to the bus; and
a master device coupled to the bus and controlling data transmissions between the master device and the one or more slave devices,
wherein data bits are transcoded into symbols for transmission across the bus and a clock signal is embedded within symbol transitions of the data transmissions,
wherein an interrupt period associated with transmission of a first signaling condition by the master device provides an opportunity for the one or more slave devices to assert an interrupt request on a first line of the bus, and
wherein the master device is configured to monitor the first line for an interrupt request from a slave device during the interrupt period.

13. The device of claim 12 , wherein the first signaling condition is produced by transmission of a heartbeat word that is one of a set of twenty-bit words that have a most significant bit set to a first logic value, and wherein payload data transmitted between the master device and the one or more slave devices comprises twenty-bit words that have the most significant bit set to a second logic level.

14. The device of claim 13 , wherein the one or more slave devices are configured to assert an interrupt request by transmitting a response word on the first line and a second line of the bus, and wherein the response word differs from the heartbeat word by one bit and has a most significant bit identical to a most significant bit of the heartbeat word.

15. The device of claim 12 , wherein the master device is configured to:
perform a scan of the slave devices over the bus to identify a first slave device that asserted the interrupt request.

16. The device of claim 15 , wherein the master device is configured to:
receive an indicator over the first line from the first slave device.

17. The device of claim 12 , wherein the one or more slave devices are configured to:
assert an interrupt request by pulling down the first line during the interrupt period.

18. The device of claim 12 , wherein the one or more slave devices are configured to:
internally mask the first line during the interrupt period for purposes of decoding the transcoded data bits received over the bus.

19. A method operational on a slave device, comprising:
receiving data transmissions over a bus from a master device, where data bits are transcoded into symbols for transmission across two lines of the bus, a clock signal is embedded within symbol transitions of the data transmissions, and an interrupt period is defined within the symbols received over the bus; and
asserting an interrupt request on a first line of the bus while receiving a first signaling condition transmitted from the master device over the first line and a second line of the bus, wherein asserting the interrupt request includes pulling down the first line during the interrupt period.

20. The method of claim 19 , wherein the interrupt request is an indicator that the slave device wishes to request some action by the master device.

21. The method of claim 19 , further comprising:
internally masking the first line, during the interrupt period, for purposes of decoding the transcoded data bits received over the bus.

22. The method of claim 19 , further comprising:
receiving a slave identifier scan request from the master device over a first line and a second line of the bus; and
providing a unique slave identifier over a first line of the bus within part of a slave identifier scan response period provided by the slave identifier scan request.

23. The method of claim 22 , wherein the first signaling condition is produced by transmission of a heartbeat word, and further comprising:
masking the first data line after detecting the heartbeat word.

24. The method of claim 22 , further comprising:
masking the first data line while transmitting a response after a global call has been transmitted on the bus.

25.

Assignees

• Qualcomm Inc

Inventors

• Sengoku Shoichiro

Classifications

• G06F13/4221

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title

• G06F13/4068

  Electrical coupling · CPC title

• G06F13/4295

  using an embedded synchronisation · CPC title

• G06F13/24 Primary

  using interrupt (G06F13/32 takes precedence) · CPC title