Power supply circuit
US-2016252919-A1 · Sep 1, 2016 · US
Internal voltage generator of semiconductor device and method for driving the same
US9690310B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9690310-B2 |
| Application number | US-201614996372-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 15, 2016 |
| Priority date | Aug 12, 2015 |
| Publication date | Jun 27, 2017 |
| Grant date | Jun 27, 2017 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
An internal voltage generator includes: a comparison block suitable for comparing an internal voltage with a reference voltage and generating a first comparison signal having an analog level corresponding to a comparison result a first driving block suitable for driving an output terminal of the internal voltage with a source voltage in response to the first comparison signal; a logic block suitable for generating a second comparison signal having a logic level based on the first comparison signal; and a second driving block suitable for driving the output terminal of the internal voltage with the source voltage based on the second comparison signal.
First claim
Opening claim text (preview).
What is claimed is: 1. An internal voltage generator, comprising: a comparison block configured to compare an internal voltage that is fed back with a reference voltage and generate a first comparison signal having an analog level corresponding to a comparison result; a first driving block configured to drive an output terminal of the internal voltage with a source voltage in response to the first comparison signal; a logic block configured to generate a second comparison signal having a logic level corresponding to the first comparison signal; a second driving block configured to drive the output terminal of the internal voltage with the source voltage based on the second comparison signal; and an additional path providing block configured to provide the comparison block with an additional current source, in addition to a default current source included in the comparison block and enabled based on a bias voltage, based on an inverted signal of the second comparison signal. 2. The internal voltage generator of claim 1 , wherein the logic block generates the second comparison signal having a first logic level when a voltage level of the first comparison signal is lower than a logic threshold voltage. 3. The internal voltage generator of claim 2 , wherein the logic block generates the second comparison signal having a second logic level when the voltage level of the first comparison signal is higher than the logic threshold voltage. 4. The internal voltage generator of claim 3 , wherein the first driving block is selectively enabled based on the voltage level of the first comparison signal while the voltage level of the first comparison signal is higher than the logic threshold voltage and continuously enabled based on the voltage level of the first comparison signal while the voltage level of the first comparison signal is lower than the logic threshold voltage. 5. The internal voltage generator of claim 3 , wherein the second driving block is disabled while the voltage level of the first comparison signal is higher than the logic threshold voltage and enabled while the voltage level of the first comparison signal is lower than the logic threshold voltage. 6. The internal voltage generator of claim 3 , wherein the logic block includes: a first inversion unit configured to invert the first comparison signal based on the logic threshold voltage and generate an inverted logic signal; and a second inversion unit configured to invert the inverted logic signal based on the logic threshold voltage and generate the second comparison signal. 7. The internal voltage generator of claim 6 , wherein the inverted signal of the second comparison signal corresponds to the inverted logic signal.
Assignees
Inventors
Classifications
using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title
- G05F1/563Primary
including two stages of regulation at least one of which is output level responsive, e.g. coarse and fine regulation · CPC title
Internal voltage generators for integrated circuits, e.g. step down generators · CPC title
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9690310B2 cover?
- An internal voltage generator includes: a comparison block suitable for comparing an internal voltage with a reference voltage and generating a first comparison signal having an analog level corresponding to a comparison result a first driving block suitable for driving an output terminal of the internal voltage with a source voltage in response to the first comparison signal; a logic block sui…
- Who is the assignee on this patent?
- Sk Hynix Inc
- What technology area does this patent fall under?
- Primary CPC classification G05F1/563. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jun 27 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).