Imaging systems with flicker mitigation and high dynamic range

US9686488B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9686488-B2
Application numberUS-201514870578-A
CountryUS
Kind codeB2
Filing dateSep 30, 2015
Priority dateSep 30, 2015
Publication dateJun 20, 2017
Grant dateJun 20, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An image pixel may include a shutter element that is operable in an open state during which a corresponding photodiode accumulates charge and a closed state during which charge is drained from the photodiode. During a first portion of an image frame, the image pixel may operate in a flicker mitigation mode in which a non-continuous exposure period is used. During a second portion of the image frame, the image pixel may operate in a high dynamic range mode in which images are obtained with exposures of varying lengths. To conserve memory requirements, the signal from the flicker mitigation mode may not be sampled until the end of the first exposure of the high dynamic range mode.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for capturing image data for an image pixel during an image frame, wherein the image pixel comprises a photodiode, a charge storage region, and a charge readout circuit coupled between the charge storage region and an output line, the method comprising: with the photodiode, accumulating an amount of charge in a flicker mitigation mode for a first time period, wherein the amount of charge is stored in the charge storage region; with the photodiode, accumulating an additional amount of charge in a high dynamic range mode for a second time period that is subsequent to the first time period, wherein the second time period comprises a first high dynamic range exposure and a second high dynamic range exposure subsequent to the first high dynamic range exposure; and at the end of first high dynamic range exposure, using the charge readout circuit to supply a first signal to the output line corresponding to the amount of charge on the charge storage region. 2. The method defined in claim 1 , wherein the image pixel further comprises a power supply terminal, a first transistor coupled between the power supply terminal and the photodiode, and a second transistor coupled between the photodiode and the charge storage region, and wherein accumulating the amount of charge in the flicker mitigation mode for the first time period comprises: with the photodiode, accumulating the amount of charge over an exposure time, wherein the exposure time is non-continuous and comprises multiple integration periods that are each shorter than the exposure time; prior to each integration period, resetting the photodiode using the first transistor; and at the end of each integration period, transferring a portion of the amount of charge from the photodiode to the charge storage region using the second transistor. 3. The method defined in claim 2 , wherein transferring the portion of the amount of charge from the photodiode to the charge storage region at the end of each integration period comprises transferring all collected charge that accumulated on the photodiode during the integration period to the charge storage region. 4. The method defined in claim 2 , further comprising: asserting the first transistor in between the integration periods, wherein when the first transistor is asserted, charge is drained from the photodiode. 5. The method defined in claim 4 , further comprising: deasserting the first transistor during the integration periods, wherein when the first transistor is deasserted, charge accumulates on the photodiode. 6. The method defined in claim 1 , further comprising: after using the charge readout circuit to supply the first signal to the output line corresponding to the amount of charge on the charge storage region, resetting the amount of charge at the charge storage region with a reset transistor. 7. The method defined in claim 6 , further comprising: after resetting the amount of charge at the charge storage region with the reset transistor, supplying a second signal to the output line corresponding to the amount of charge on the charge storage region. 8. The method defined in claim 7 , further comprising: after supplying the second signal to the output line corresponding to the amount of charge on the charge storage region, transferring an amount of charge that accumulated during the first high dynamic range exposure to the charge storage region with a transfer transistor. 9. The method defined in claim 8 , further comprising: after transferring the amount of charge that accumulated during the first high dynamic range exposure to the charge storage region, supplying a third signal to the output line corresponding to the amount of charge that accumulated during the first high dynamic range exposure. 10. The method defined in claim 1 , wherein the first high dynamic range exposure is longer than the second high dynamic range exposure. 11. The method defined in claim 10 , wherein the first high dynamic range exposure is more than ten times longer than the second high dynamic range exposure. 12. A method for capturing image data for an image pixel during an image frame, wherein the image pixel comprises a photodiode, a shutter element, a charge storage region, a transfer transistor coupled between the charge storage region and the photodiode, and a charge readout circuit coupled between the charge storage region and an output line, and wherein the shutter element is operable in an open state during which the photodiode accumulates charge and a closed state during which charge is drained from the photodiode, the method comprising: during a first time period, accumulating charge during a first exposure period, wherein the first exposure period is non-continuous and comprises a plurality of integration periods, wherein the shutter element is in the open state during each integration period and in the closed state in between the integration periods, and wherein the charge accumulated during the first exposure period is transferred to the charge storage region with the transfer transistor; at the end of the first time period, placing the shutter element in the open state; during a second time period subsequent to the first time period, accumulating charge during a second exposure period; and after the majority of the second time period has passed, supplying a first signal to the output line corresponding to the charge accumulated during the first exposure period. 13. The method defined in claim 12 , wherein the image pixel comprises a reset transistor, the method further comprising: after supplying the first signal to the output line corresponding to the charge accumulated during the first exposure period, resetting the charge storage region with the reset transistor. 14. The method defined in claim 13 , further comprising: after resetting the charge storage region with the reset transistor, supplying a second signal to the output line corresponding to a reset level of charge. 15. The method defined in claim 14 , further comprising: after supplying the second signal to the output line corresponding to the reset level of charge, transferring the charge accumulated during the second exposure period to the charge storage region. 16. The method defined in claim 15 , further comprising: after transferring the charge accumulated during the second exposure period to the charge storage region, supplying a third signal to the output line corresponding to the charge accumulated during the second exposure period. 17. The method defined in claim 16 , wherein transferring charge accumulated during the second exposure period to the charge storage region comprises transferring charge accumulated during the second exposure period to the charge storage region during the second time period, and wherein supplying the third signal to the output line corresponding to the charge accumulated during the second exposure period comprises supplying the third signal to the output line corresponding to the charge accumulated during the second exposure period during a third time period that is subsequent to the second time period. 18. The method defined in claim 17 , further comprising: during the third time period, accumulating charge during a third exposure period, wherein the third exposure period is shorter than the second exposure period. 19. A method for capturing image data for an image pixel during an image frame, wherein the image pixel comprises a photodiode and a charge readout circuit coupled to an output line, th

Assignees

Inventors

Classifications

  • H04N25/589Primary

    with different integration times, e.g. short and long exposures · CPC title

  • H04N23/741Primary

    by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors · CPC title

  • Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination · CPC title

  • by influencing the exposure time · CPC title

  • involving two or more exposures · CPC title

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What does patent US9686488B2 cover?
An image pixel may include a shutter element that is operable in an open state during which a corresponding photodiode accumulates charge and a closed state during which charge is drained from the photodiode. During a first portion of an image frame, the image pixel may operate in a flicker mitigation mode in which a non-continuous exposure period is used. During a second portion of the image f…
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H04N25/589. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).