Amplifier circuit

Patent metadata

Field	Value
Publication number	US-9685914-B2
Application number	US-201615065066-A
Country	US
Kind code	B2
Filing date	Mar 9, 2016
Priority date	Sep 13, 2013
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair. Therefore, compared with the related art, it is possible to decrease the number of transistors in the input stage and to reduce a flicker noise.

First claim

What is claimed is:

1. An amplifier circuit comprising:
a differential pair including a pair of a first transistor and a second transistor, wherein each of the first transistor and the second transistor is a transistor in which, in response to a voltage between a control terminal and a first terminal, a current flowing between the first terminal and a second terminal is controlled, and a differential signal is input to a pair of the control terminals included in the pair of the first transistor and the second transistor;
a load circuit configured to generate a differential signal corresponding to currents flowing through a pair of the second terminals included in the pair of the first transistor and the second transistor in the differential pair;
an output amplifier stage configured to amplify and output the differential signal generated by the load circuit;
a feedback circuit configured to feed the differential signal output by the output amplifier stage back to a pair of the first terminals included in the pair of the first transistor and the second transistor in the differential pair;
a first chopping circuit configured to shift, to a frequency band on a high frequency side, frequency components of the differential signal input to the pair of the control terminals in the differential pair by repeatedly inverting polarity of the differential signal;
a second chopping circuit configured to bring, back to an original frequency band from the frequency band on the high frequency side, frequency components of the differential signal input to the output amplifier stage by repeatedly inverting, in synchronization with the polarity inversion operation of the first chopping circuit, polarity of the differential signal; and
a third chopping circuit configured to shift, to the frequency band on the high frequency side, frequency components of the differential signal fed back to the pair of the first terminals of the differential pair by the feedback circuit by repeatedly inverting, in synchronization with the polarity inversion operation of the first chopping circuit, polarity of the differential signal; and
wherein the output amplifier stage has a low-pass filter characteristic for attenuating frequency components due to the polarity inversion operation in the first chopping circuit.

2. The amplifier circuit according to claim 1 , further comprising: An amplifier circuit comprising:
a first chopping circuit configured to shift, to a frequency band on a high frequency side, frequency components of the differential signal input to the pair of the control terminals in the differential pair by repeatedly inverting polarity of the differential signal; a second chopping circuit configured to bring, back to an original frequency band from the frequency band on the high frequency side, frequency components of the differential signal input to the output amplifier stage by repeatedly inverting, in synchronization with the polarity inversion operation of the first chopping circuit, polarity of the differential signal; a third chopping circuit configured to shift, to the frequency band on the high frequency side, frequency components of the differential signal fed back to the pair of the first terminals of the differential pair by the feedback circuit by repeatedly inverting, in synchronization with the polarity inversion operation of the first chopping circuit, polarity of the differential signal; wherein the output amplifier stage has a low-pass filter characteristic for attenuating frequency components due to the polarity inversion operation in the first chopping circuit; a differential pair including a pair of a first transistor and a second transistor, wherein each of the first transistor and the second transistor is a transistor in which, in response to a voltage between a control terminal and a first terminal, a current flowing between the first terminal and a second terminal is controlled, and a differential signal is input to a pair of the control terminals included in the pair of the first transistor and the second transistor; a load circuit configured to generate a differential signal corresponding to currents flowing through a pair of the second terminals included in the pair of the first transistor and the second transistor in the differential pair; an output amplifier stage configured to amplify and output the differential signal generated by the load circuit; a feedback circuit configured to feed the differential signal output by the output amplifier stage back to a pair of the first terminals included in the pair of the first transistor and the second transistor in the differential pair; and
a differential amplifier stage configured to amplify the differential signal input to the second chopping circuit by the load circuit.

3. An amplifier circuit comprising:
a differential pair including a pair of a first transistor and a second transistor, wherein each of the first transistor and the second transistor is a transistor in which, in response to a voltage between a control terminal and a first terminal, a current flowing between the first terminal and a second terminal is controlled, and a differential signal is input to a pair of the control terminals included in the pair of the first transistor and the second transistor;
a load circuit configured to generate a differential signal corresponding to currents flowing through a pair of the second terminals included in the pair of the first transistor and the second transistor in the differential pair;
an output amplifier stage configured to amplify and output the differential signal generated by the load circuit;
a feedback circuit configured to feed the differential signal output by the output amplifier stage back to a pair of the first terminals included in the pair of the first transistor and the second transistor in the differential pair;
a resistance circuit provided in paths of currents shunted from a common node to the pair of the first terminals in the differential pair;
a variable resistance element provided in a path of a current flowing from a first power-supply line to the common node;
a common-mode feedback circuit configured to control resistance of the variable resistance element so that a common-mode voltage in the pair of the second terminals of the differential pair comes close to a predetermined voltage corresponding to an input reference voltage; and
a reference voltage generation circuit including a third transistor having the same conductivity type as that of each of the first transistor and the second transistor configuring the differential pair, the third transistor inputting and outputting, to the first terminal thereof and from the second terminal thereof, a current flowing from the first power-supply line, the control terminal of the third transistor being connected to the second terminal, and a first constant current circuit configured to apply a constant current from the second terminal of the third transistor to a second power-supply line, wherein the reference voltage generation circuit generates the reference voltage corresponding to a voltage generated between the first terminal and the second terminal of the third transistor.

4. The amplifier circuit according to claim 3 , wherein
the common-mode feedback circuit includes:
a pair of a fourth transistor and a fifth transistor connected in parallel in the pair of the first terminals and the pair of the second terminals,
a sixth transistor including the first terminal connected in common to the pair of the first terminals included in the pair of the fourth transistor and the fifth transistor,
a current mirror circuit configured to apply, from the second terminal of the sixth transistor to the second power-supply line, a current corresponding to a current flowing from the pair of the second terminals include

Assignees

• Alps Electric Co Ltd

Inventors

• Sasai Kiyoshi
• Asao Akira

Classifications

• H03F2203/45674

  the LC comprising one current mirror · CPC title

• H03F2200/171

  A filter circuit coupled to the output of an amplifier · CPC title

• H03F2203/45682

  the LC comprising one or more op-amps · CPC title

• H03F2200/555

  A voltage generating circuit being realised for biasing different circuit elements · CPC title

• H03F3/45668

  Controlling the input circuit of the differential amplifier · CPC title