Reversible resistivity memory with crystalline silicon bit line

US9685484B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9685484-B1
Application numberUS-201615215263-A
CountryUS
Kind codeB1
Filing dateJul 20, 2016
Priority dateJul 20, 2016
Publication dateJun 20, 2017
Grant dateJun 20, 2017

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Abstract

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Technology is described for reversible resistivity memory having a crystalline silicon bit line. In one aspect, a memory structure comprises a hollow pillar of crystalline silicon inside of reversible resistivity material. The crystalline silicon may serve as a bit line. The memory structure may further comprise conductive material that forms word lines coupled to the outer surface of the reversible resistivity material. A memory cell comprises a portion of the reversible resistivity material between the crystalline silicon and one of the word lines. In one aspect, the hollow pillar of crystalline silicon surrounds a gate oxide, which surrounds a conductive transistor gate. Thus, the hollow pillar of crystalline silicon may function as a channel of a transistor. In one aspect, the crystalline silicon has predominantly a (100) orientation with respect to an inner surface of the reversible resistivity material. In one aspect, the crystalline silicon is a single crystal.

First claim

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What is claimed is: 1. A non-volatile storage device, comprising: a hollow pillar of reversible resistivity material the hollow pillar of reversible resistivity material having an inner surface and an outer surface; a hollow pillar of crystalline silicon inside of the hollow pillar of reversible resistivity material, the hollow pillar of crystalline silicon having an inner surface and an outer surface, the hollow pillar of crystalline silicon being a bit line, the crystalline silicon having predominantly a (100) orientation with respect to the inner surface of the reversible resistivity material; and a plurality of word lines coupled to the outer surface of the hollow pillar of reversible resistivity material, portions of the reversible resistivity material between the crystalline silicon and ones of the plurality of word lines being memory cells. 2. The non-volatile storage device of claim 1 , wherein the hollow pillar of crystalline silicon is a single crystal of silicon having a (100) orientation with respect to the inner surface of the reversible resistivity material. 3. The non-volatile storage device of claim 1 , wherein the hollow pillar of crystalline silicon comprises grains of polysilicon with predominantly all of the hollow pillar of crystalline silicon being grains of polysilicon having a (100) orientation with respect to the inner surface of the reversible resistivity material. 4. The non-volatile storage device of claim 1 , further comprising: a hollow pillar of dielectric material inside the hollow pillar of crystalline silicon, the hollow pillar of dielectric material having an inner surface and an outer surface, wherein the crystalline silicon has predominantly a (100) orientation with respect to the outer surface of the dielectric material; and a control gate inside of the hollow pillar of dielectric material, the hollow pillar of crystalline silicon configured to go into either a conductive state or a non-conductive state responsive to a voltage provided to the control gate. 5. The non-volatile storage device of claim 4 , wherein the hollow pillar of crystalline silicon is a single crystal of silicon having a (100) orientation with respect to the outer surface of the dielectric material. 6. The non-volatile storage device of claim 4 , wherein the hollow pillar of crystalline silicon comprises grains of polysilicon with predominantly all of the hollow pillar of crystalline silicon being grains of polysilicon having a (100) orientation with respect to the outer surface of the dielectric material. 7. The non-volatile storage device of claim 1 , wherein the hollow pillar of crystalline silicon is a hollow cylinder. 8. The non-volatile storage device of claim 1 , wherein the hollow pillar of crystalline silicon is a hollow prism. 9. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising: forming alternating layers of conducting material and insulating material above a substrate; forming memory holes that extend through the alternating layers of conducting material and insulating material; forming a hollow pillar of reversible resistivity material inside the memory holes, the hollow pillar of reversible resistivity material having an inner surface and an outer surface; forming a hollow pillar of crystalline silicon inside of the hollow pillar of reversible resistivity material, the hollow pillar of crystalline silicon having an inner surface and an outer surface, the hollow pillar of crystalline silicon being a bit line, the crystalline silicon having predominantly a (100) orientation with respect to the inner surface of the reversible resistivity material; and forming a plurality of word lines from the alternating layers of conducting material, the plurality of word lines coupled to the outer surface of the hollow pillar of reversible resistivity material, portions of the reversible resistivity material between the crystalline silicon and ones of the plurality of word lines being memory cells. 10. The method of claim 9 , wherein the forming a hollow pillar of crystalline silicon inside of the hollow pillar of reversible resistivity material comprises: forming a layer of metal within the memory hole on the reversible resistivity material; forming a layer of amorphous silicon within the memory hole on the layer of metal; performing a thermal anneal to cause metal from the layer of metal and to cause silicon from the layer of amorphous silicon to switch places while crystallizing the silicon that came from the layer of amorphous silicon to form a layer of crystalline silicon having a hollow shape with metal from the layer of metal exposed on the crystalline silicon in the memory hole; and removing the exposed metal leaving the layer of crystalline silicon having the hollow shape in the memory hole. 11. The method of claim 10 , wherein the reversible resistivity material comprises hafnium oxide and the layer of metal comprises one or more of: aluminum, nickel, gold, silver, platinum, or palladium. 12. The method of claim 10 , wherein the forming a hollow pillar of crystalline silicon inside of the hollow pillar of reversible resistivity material further comprises: forming a first layer of amorphous silicon in the memory hole directly on the reversible resistivity material, the layer of metal being formed directly on the first layer of amorphous silicon, the layer of amorphous silicon that is formed on the layer of metal is a second layer of amorphous silicon. 13. The method of claim 9 , further comprising: oxidizing the inner surface of the hollow pillar of crystalline silicon to form a hollow gate oxide layer within the memory hole; and forming a conductive material for a gate in the memory hole on the hollow gate oxide layer. 14. The method of claim 9 , further comprising: forming a gate oxide on the hollow pillar of crystalline silicon; and performing an argon anneal after forming the gate oxide. 15. The method of claim 9 , further comprising: forming a gate oxide on the hollow pillar of crystalline silicon; and performing an anneal with argon and a hydrogen isotope. 16. A three-dimensional (3D) non-volatile storage device, comprising: a plurality alternating horizontal layers of conducting material and insulating layers above a substrate; a plurality of hollow cylindrical or prismatic pillars of reversible resistivity material that extend vertically through the plurality alternating horizontal layers of conducting material and insulating layers, each of the hollow cylindrical or prismatic pillars of reversible resistivity material having an inner surface and an outer surface, portions of the horizontal layers of conducting material serving as word lines; a hollow cylindrical or prismatic pillar of crystalline silicon inside of each of the hollow cylindrical or prismatic pillars of reversible resistivity material, the hollow cylindrical or prismatic pillar of crystalline silicon having an inner surface and an outer surface, the hollow cylindrical or prismatic pillar of crystalline silicon being a local bit line, a portion of the reversible resistivity material between a local bit line and a word line being a memory cell, the crystalline silicon having predominantly a (100) orientation with respect to the inner surface of the reversible resistivity material; a hollow cylindrical or prismatic pillar of dielectric material inside of each of the hollow cylindrical or prismatic pillars of crystalline silicon, the dielectric material having an inner surface and an outer surface; a control gate inside each of the hollo

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Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • adapted for essentially horizontal current flow, e.g. bridge type devices · CPC title

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What does patent US9685484B1 cover?
Technology is described for reversible resistivity memory having a crystalline silicon bit line. In one aspect, a memory structure comprises a hollow pillar of crystalline silicon inside of reversible resistivity material. The crystalline silicon may serve as a bit line. The memory structure may further comprise conductive material that forms word lines coupled to the outer surface of the rever…
Who is the assignee on this patent?
Sandisk Technologies Llc
What technology area does this patent fall under?
Primary CPC classification H01L27/2481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).