Stable contact on one-sided gate tie-down structure

Patent metadata

Field	Value
Publication number	US-9685340-B2
Application number	US-201514753827-A
Country	US
Kind code	B2
Filing date	Jun 29, 2015
Priority date	Jun 29, 2015
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

After forming a first contact opening to expose a portion of a first source/drain contact located at one side of a functional gate structure followed by forming a second contact opening that intersects the first contact opening to expose the functional gate structure and a portion of a second source/drain contact located at an opposite side of the functional gate structure, the exposed portions of the first source/drain contact and the second-side source/drain contact are recessed. A dielectric cap is subsequently formed over the recessed portion of the second source/drain contact. A shared contact is formed in the first contact opening and the second contact opening to electrically connect a gate conductor of the functional gate structure to the first source/drain contact. The dielectric cap isolates the second source/drain contact from the shared contact, thus preventing contact shorts in a one-sided gate tie-down structure for 7 nm node and beyond.

First claim

What is claimed is:

1. A semiconductor structure comprising:
a functional gate structure located over a semiconductor material layer and laterally surrounded by an interlevel dielectric (ILD) layer;
a first source/drain region located at a first side of the functional gate structure and a second source/drain region located at a second side of the functional gate structure opposite the first side;
a first source/drain contact and a second source/drain contact embedded within the ILD layer, the first source/drain contact overlying and contacting a portion of the first source/drain region and having a recessed portion proximal to the first side of the functional gate structure, the second source/drain contact overlying and contacting a portion of the second source/drain region and having a recessed portion proximal to the second side of the functional gate structure;
a shared contact contacting an entire top surface of a gate conductor of the functional gate structure and a portion of the first source/drain contact; and
a dielectric cap present over the recessed portion of the second source/drain contact, the dielectric cap contacting a sidewall of the shared contact and isolating the second source/drain contact from the shared contact.

2. The semiconductor structure of claim 1 , wherein a top surface of the recessed portion of each of the first source/drain contact and the second source/drain contact is located below the top surface of the gate conductor.

3. The semiconductor structure of claim 2 , wherein the shared contact is in direct contact with the top surface of the gate conductor and the top surface of the recessed portion of first source/drain contact.

4. The semiconductor structure of claim 3 , wherein a portion of the shared contact is laterally surrounded by a dielectric spacer present on the top surface of the recessed portion of first source/drain contact.

5. The semiconductor structure of claim 4 , wherein the dielectric cap and the dielectric spacer comprise a same dielectric material.

6. The semiconductor structure of claim 1 , wherein the shared contact is embedded within a contact level dielectric layer overlying the ILD layer.

7. The semiconductor structure of claim 1 , further comprising a first metal semiconductor alloy portion located between the first source/drain contact and the first source/drain region and a second metal semiconductor alloy portion located between the second source/drain contact and the second source/drain region.

8. The semiconductor of claim 1 , wherein each of the first source/drain contact, the second source/drain contact and the shared contact includes a stack of, from bottom to top, a contact liner and a conductive material portion surrounded by the contact liner.

9. The semiconductor structure of claim 2 , further comprising another dielectric cap present over the recessed portion of the first source/drain contact.

10. The semiconductor structure of claim 9 , wherein the shared contact is in direct contact with the top surface of the gate conductor, a top surface of the another dielectric cap and a top surface of an unrecessed portion of the first source/drain contact.

11. The semiconductor structure of claim 9 , wherein the another dielectric cap laterally contacts a sidewall of an unrecessed portion of the first source/drain contact.

12. The semiconductor structure of claim 9 , wherein the dielectric cap has a lateral dimension greater than the another dielectric cap.

13. The semiconductor structure of claim 10 , wherein a portion of the shared contact is laterally surrounded by a dielectric spacer present on the top surface of the dielectric cap and another dielectric spacer present on the top surface of the unrecessed portion of the first source/drain contact.

14. The semiconductor structure of claim 1 , wherein the functional gate structure further comprises a gate dielectric surrounding the gate conductor, and a gate spacer present on vertical portions of the gate dielectric.

15. The semiconductor structure of claim 1 , wherein a top surface of an unrecessed portion of each of the first source/drain contact and the second source/drain contact is coplanar with a top surface of the ILD layer.

16. The semiconductor structure of claim 8 , wherein the contact liner comprises Ti, TiN, Ta, TaN, Ni, Pt, Co, Ru, Pd, Er, Hf, La, or an alloy thereof, and the conductive material portion comprises W, Al, Cu, or an alloy thereof.

17. The semiconductor structure of claim 1 , wherein the dielectric cap laterally contacts a sidewall of an unrecessed portion of the second source/drain contact.

Assignees

• IBM

Inventors

• Ok Injo
• Pranatharthiharan Balasubramanian
• Seo Soon-Cheon
• Surisetty Charan Veera Venkata Satya

Classifications

• H10W20/0698

  Local interconnections · CPC title

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title

• H10W20/081

  by forming openings in the dielectric parts · CPC title

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/069

  by forming self-aligned vias or self-aligned contact plugs · CPC title