Organic light emitting display for compensating for variations in electrical characteristics of driving element

Patent metadata

Field	Value
Publication number	US-9685119-B2
Application number	US-201414586567-A
Country	US
Kind code	B2
Filing date	Dec 30, 2014
Priority date	Jun 26, 2014
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

An organic light emitting display is provided which offers shorter sensing time and higher sensing accuracy when sensing variations in electrical characteristics of a driving element. The organic light emitting display can include: a display panel with a plurality of pixels; a gate driving circuit that generates a sensing gate pulse corresponding to one line sensing ON time in a sensing operation and sequentially supplies the same to gate lines in a line sequential manner; a data driving circuit comprising a plurality of current integrators that perform an integration of the source-drain current of the driving TFT of each pixel input through the sensing lines and an ADC that sequentially digitizes the output of the current integrators to output digital sensed values; and a timing controller that controls the operations of the gate driving circuit and data driving circuit.

First claim

What is claimed is:

1. An organic light emitting display comprising:
a display panel with a plurality of pixels, each pixel comprising an organic light emitting diode (OLED) and a driving thin film transistor (TFT) for controlling an amount of light emission of the OLED and being connected to any one of data lines, any one of gate lines, and any one of sensing lines;
a gate driving circuit that generates a sensing gate pulse corresponding to one line sensing ON time defined by a ON pulse region of the sensing gate pulse in a sensing operation and sequentially supplies the sensing gate pulse to the gate lines in a line sequential manner,
wherein the sensing operation includes an initialization, a sensing, and a sampling performed in an initialization period, a sensing period, and a sampling period, respectively;
a data driving circuit comprising:
a plurality of digital-to-analog converters (DACs) that generate a sensing data voltage and supply the sensing data voltage to the data lines within the initialization period of the one line sensing ON time in the sensing operation,
a plurality of current integrators that perform an integration of a source-drain current of the driving TFT of each pixel input through the sensing lines in the sensing period, wherein the source-drain current entering through the sensing lines is converted into an integrated value through an integration capacitor,
a plurality of samplers each of which includes:
a first switch directly connected to the integration capacitor and configured to pass the integrated value in the sensing period,
a holding capacitor configured to store the integrated value when the first switch is turned on in the sensing period, and
a second switch configured to be turned on in a predetermined time after the first switch is turned off to pass the integrated value stored in the holding capacitor in the sampling period;

an analog-to-digital converter (ADC) that converts the integrated value stored in the holding capacitor into a digital sensed value; and
a timing controller that controls the gate driving circuit and data driving circuit to perform the integration of the source-drain current and derives a threshold voltage variation and a mobility variation of the driving TFT using the digital sensed value.

2. The organic light emitting display of claim 1 , wherein the source-drain current includes a first source-drain current caused by a first level of the sensing data voltage and a second source-drain current caused by a second level of the sensing data voltage within the one line sensing ON time.

3. The organic light emitting display of claim 2 , wherein the first level of the sensing data voltage is a voltage level corresponding to a predetermined region of a low grayscale current in an entire grayscale range and the second level of the sensing data voltage is a voltage level corresponding to a predetermined region of a high grayscale current in the entire grayscale region.

4. The organic light emitting display of claim 2 , wherein the first level of the sensing data voltage is a voltage level corresponding to a predetermined region of a high grayscale current in an entire grayscale range and the second level of the sensing data voltage is a voltage level corresponding to a predetermined region of a low grayscale current in the entire grayscale region.

5. The organic light emitting display of claim 1 , wherein the timing controller controls the gate driving circuit to generate the sensing gate pulse in multiple pulses so that two or more of the ON pulse region of the sensing gate pulse are included in the one line sensing ON time.

6. The organic light emitting display of claim 1 , wherein the timing controller controls a sensing period in a first sensing & sampling period and a sensing period in a second sensing & sampling period according to a level of the sensing data voltage to differ in length from each other, and sensing periods are adjusted to be inversely proportional to the level of the sensing data voltage.

7. The organic light emitting display of claim 1 , wherein the organic light emitting display further comprises a capacitance controller for adjusting a capacitance of the integration capacitor included in the current integrator,
the integration capacitor comprising a plurality of capacitors connected in parallel to an inverting input terminal of an amplifier, the other end of each of the capacitors being connected to an output terminal of the amplifier through different capacitance adjustment switches, and
wherein the timing controller controls an operation of the capacitance controller based on a result of analysis of the digital sensed values input form the ADC to generate a switching control signal for turning on/off the capacitance adjustment switches.

8. The organic light emitting display of claim 1 , wherein the organic light emitting display further comprises a programmable voltage adjustment IC for adjusting an ADC reference voltage by which an input voltage range of the ADC is determined, and
wherein the timing controller controls an operation of the programmable voltage adjustment IC based on a result of analysis of the digital sensed values to adjust the ADC reference voltage.

9. An organic light emitting display comprising:
a plurality of pixels in a display panel, each pixel including an organic light emitting diode (OLED) and a driving thin film transistor (TFT) connected to one of data lines, gate lines, and sensing lines, respectively;
a gate driver configured to generate a sensing gate pulse corresponding to one line sensing ON time defined by a ON pulse region of the sensing gate pulse in a sensing operation and sequentially supply the sensing gate pulse to the gate lines in a line sequential manner, wherein the sensing operation includes initialization, sensing, and sampling operations performed in an initialization period, a sensing period, and a sampling period, respectively;
a data driver including a digital-to-analog converter (DAC), a current integrator, a sampler, and an analog-to-digital converter (ADC),
wherein the DAC supplies a sensing data voltage to the data lines in the initialization period of the one line sensing ON time in the sensing operation,
wherein the current integrator including an amplifier and an integration capacitor performs an integration of a source-drain current of the driving TFT of each pixel input through the sensing lines in the sensing period, the source-drain current entering through the sensing lines being converted into an integrated value through the integration capacitor,
wherein the sampler includes:
a first switch directly connected to the integration capacitor and configured to pass the integrated value in the sensing period,
a holding capacitor configured to store the integrated value when the first switch is turned on in the sensing period, and
a second switch configured to be turned on in a predetermined time after the first switch is turned off to pass the integrated value stored in the holding capacitor in the sampling period, and

wherein the ADC converts the integrated value stored in the holding capacitor of the sampler into a digital sensed value; and
a timing controller configured to control the gate and data drivers to perform the integration of the source-drain current and derive a threshold voltage variation and a mobility variation of the driving TFT using the digital sensed value.

10. The organic light emitting display of claim 9 , wherein the timing controller controls the gate driver to generate the sensing gate pulse in multiple pulses so that two or more of the ON pulse region of the sensing gate pulse are included in the one line sensing ON time.

Assignees

• Lg Display Co Ltd

Inventors

• Kim Taegung
• Kim Junghyeon
• Yoon Jinhan

Classifications

• G09G2310/027

  Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2320/029

  by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel · CPC title

• G09G3/006

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G3/3275 Primary

  Details of drivers for data electrodes · CPC title