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US-2024419626-A1 · Dec 19, 2024 · US
Parallel processing and internal processors
US9684632B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9684632-B2 |
| Application number | US-47841209-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 4, 2009 |
| Priority date | Jun 4, 2009 |
| Publication date | Jun 20, 2017 |
| Grant date | Jun 20, 2017 |
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Abstract
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Systems, internal processors, and methods of parallel data processing in an internal processor are provided. In one embodiment, an external controller sends instructions to a memory device, and the internal processor on the memory device executes the instructions on the data. The internal processor may include one or more arithmetic logic units (ALUs), and each ALU may perform an operation on an entire operand, such that one or more operands may be processed in parallel by one or more ALUs in the internal processor. The operations may be completed on each operand in one or more cycles through the circuitry of the ALU, and the path of the operands through the ALU may be based on the width of the ALU, the size of the operands, or the type of operation to be performed.
First claim
Opening claim text (preview).
What is claimed is: 1. A system comprising: a memory device comprising: a plurality of internal processors each having a 1 bit width and configured to operate in parallel; a first larger internal processor comprising a first eight internal processors of the plurality of internal processors, wherein, to perform a multiplication operation on a first operand larger than a byte width of the first larger internal processor, the first larger internal processor is configured to: rece…
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Cross-Sectional Technologies · mapped topic
- G06F15/7842Primary
Physics · mapped topic
Physics · mapped topic
Cross-Sectional Technologies · mapped topic
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Frequently asked questions
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- What does patent US9684632B2 cover?
- Systems, internal processors, and methods of parallel data processing in an internal processor are provided. In one embodiment, an external controller sends instructions to a memory device, and the internal processor on the memory device executes the instructions on the data. The internal processor may include one or more arithmetic logic units (ALUs), and each ALU may perform an operation on a…
- Who is the assignee on this patent?
- Walker Robert, Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification G06F15/7842. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jun 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).