Regulator circuit that suppresses an overshoot of output voltage

Patent metadata

Field	Value
Publication number	US-9684323-B2
Application number	US-201514634703-A
Country	US
Kind code	B2
Filing date	Feb 27, 2015
Priority date	Jul 31, 2014
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

A regulator circuit includes a first MOS transistor having a current channel connected between an input terminal and an output terminal, a regulator control circuit configured to control an amount of a current flowing through the current channel of the first MOS transistor towards the output terminal, a second MOS transistor having a current channel connected between the input terminal and the current channel of the first MOS transistor, and a body diode, a forward direction of which is along a direction from the input terminal to the output terminal, and a switch control circuit configured to switch off the second MOS transistor when a voltage at the input terminal decreases to a predetermined value that is equal to or greater than a voltage at the output terminal.

First claim

What is claimed is:

1. A regulator circuit comprising:
a first MOS transistor having a current channel connected between an input terminal and an output terminal;
a regulator control circuit configured to control an amount of a current flowing through the current channel of the first MOS transistor towards the output terminal;
a second MOS transistor having a current channel connected between the input terminal and the current channel of the first MOS transistor, and a body diode, a forward direction of which is along a direction from the input terminal to the output terminal; and
a switch control circuit configured to control the second MOS transistor, wherein the switch control circuit includes
a comparator having first and second terminals as input terminals thereof and a third terminal as an output terminal thereof, the first terminal of the comparator connected to the input terminal, the second terminal of the comparator connected to the output terminal, and the third terminal of the comparator connected to a control electrode of the second MOS transistor by which a control signal is supplied to the second MOS transistor, and
a resistor connected between the third terminal of the comparator and a node between the current channel of the first MOS transistor and the current channel of the second MOS transistor.

2. The regulator circuit according to claim 1 , wherein
the switch control circuit is further configured to detect that a voltage at the input terminal decreases to a predetermined value and control the second MOS transistor to switch off when the voltage at the input terminal decreases to the predetermined value.

3. The regulator circuit according to claim 1 , wherein
the first MOS transistor includes a body diode having a forward direction that is opposite to the forward direction of the body diode of the second MOS transistor.

4. The regulator circuit according to claim 1 , wherein
the switch control circuit is further configured to detect that a voltage at the node decreases to a predetermined value and control the second MOS transistor to switch off when the voltage at the node decreases to the predetermined value.

5. The regulator circuit according to claim 2 , wherein
the switch control circuit further includes a switch connected between the control electrode of the second MOS transistor and the node.

6. The regulator circuit according to claim 4 , wherein
the switch control circuit further includes a switch connected between the control electrode of the second MOS transistor and the node.

7. The regulator circuit according to claim 5 , wherein
the switch control circuit further includes a resistor connected between the control electrode of the second MOS transistor and the switch.

8. The regulator circuit according to claim 6 , wherein
the switch control circuit further includes a resistor connected between the control electrode of the second MOS transistor and the switch.

9. A regulator circuit comprising:
a first MOS transistor having a current channel connected between an input terminal and an output terminal;
a regulator control circuit configured to control an amount of a current flowing through the current channel of the first MOS transistor towards the output terminal;
a second MOS transistor having a current channel connected between the input terminal and the current channel of the first MOS transistor, and a body diode, a forward direction of which is along a direction from the input terminal to the output terminal;
a current detection circuit configured to detect a current flowing from the output terminal towards the input terminal; and
a switch control circuit configured to switch off the second MOS transistor when the current detection circuit detects the current, wherein
the current detection circuit has a first terminal connected to the current channel of the second MOS transistor, a second terminal connected to the current channel of the first MOS transistor, and a resistor connected between the first terminal and the second terminal.

10. The regulator circuit according to claim 9 , wherein
the first MOS transistor includes a body diode having a forward direction that is opposite to the forward direction of the body diode of the second MOS transistor.

11. A regulator circuit comprising:
a first MOS transistor haying a current channel connected between an input terminal and an output terminal;
a regulator control circuit configured to control an amount of a current flowing through the current channel of the first MOS transistor towards the output terminal;
a second MOS transistor haying a current channel connected between the input terminal and the current channel of the first MOS transistor, and a body diode, a forward direction of which is along a direction from the input terminal to the output terminal;
a current detection circuit configured to detect a current flowing from the output terminal towards the input terminal; and
a switch control circuit configured to switch off the second MOS transistor when the current detection circuit detects the current, wherein
the current detection circuit is connected between the current channel of the second MOS transistor and the output terminal and in parallel to the current channel of the first MOS transistor.

12. The regulator circuit according to claim 11 , wherein
the current detection circuit has a first terminal connected between the current channel of the second MOS transistor and the current channel of the first MOS transistor, a second terminal connected to the output terminal, and a resistor connected between the first terminal and the second terminal.

Assignees

• Toshiba Kk

Inventors

• Nakagawara Chikashi

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• G05F5/00

  Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output · CPC title

• G05F3/00

  Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties {(current generators specially designed for use in phase-locked loops H03L7/0891)} · CPC title