Display device

Patent metadata

Field	Value
Publication number	US-9684214-B2
Application number	US-201514669557-A
Country	US
Kind code	B2
Filing date	Mar 26, 2015
Priority date	May 21, 2014
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

The present invention relates to a display device, comprising: a substrate comprising a display region and a non-display region surrounding the display region; a first conductive layer disposed on the substrate; a semiconductor layer disposed on the substrate and partially covering the first conductive layer; and a second conductive layer disposed on a top surface of the semiconductor layer; and there is a spacing between a first side of the semiconductor layer and a second side of the second conductive layer from a top view, wherein the first side of the semiconductor layer is adjacent to the second side of the second conductive layer; wherein the spacing in the display region is a first distance, the spacing in the non-display region is a second distance, and the first distance is smaller than the second distance.

First claim

What is claimed is:

1. A display device, comprising:
a substrate comprising a display region and a non-display region outside the display region;
a first conductive layer disposed on the substrate;
a semiconductor layer disposed on the first conductive layer, wherein the semiconductor layer has a first side in the display region and a second side in the non-display region; and
a second conductive layer disposed on a top surface of the semiconductor layer, wherein the second conductive layer has a third side in the display region and a fourth side in the non-display region, the third side has a first contact border contacting the top surface, and the fourth side has a second contact border contacting the top surface;
wherein the first side of the semiconductor layer is adjacent to the first contact border of the second conductive layer, and the second side of the semiconductor layer is adjacent to the second contact border of the second conductive layer;
wherein a first interval is between the first side of the semiconductor layer and the first contact border of the second conductive layer, and a second interval is between the second side of the semiconductor layer and the second contact border of the second conductive layer;
wherein the first interval is smaller than the second interval.

2. The display device of claim 1 , wherein the semiconductor layer has a first portion and a second portion, the first conductive layer is located between the first portion and the substrate, the second portion doesn't overlap the first conductive layer.

3. The display device of claim 2 , wherein a third interval is between the first portion of the semiconductor layer and the first contact border of the second conductive layer, and a fourth interval is between the second portion of the semiconductor layer and the second contact border of the second conductive layer; wherein the third interval is smaller than the fourth interval in the non-display region.

4. The display device of claim 3 , wherein the third interval is in a range from 1 μm to 2 μm.

5. The display device of claim 2 , wherein a third interval is between the first portion of the semiconductor layer and the first contact border of the second conductive layer, and a fourth interval is between the second portion of the semiconductor layer and the second contact border of the second conductive layer; wherein the third interval is smaller than the fourth interval in the non-display region.

6. The display device of claim 5 , the third interval is in a range from 0.3 μm to 1 μm, the fourth interval is in a range from 0.7 μm to 1.5 μm.

7. The display device of claim 1 , wherein the second conductive layer comprises a data line in the display region, wherein the data line, the first conductive layer and the semiconductor layer form a thin film transistor, the data line has a fifth side and a sixth side, the sixth side is opposite to the fifth side, and the fifth side is near to the a channel of the thin film transistor; and
wherein the first interval is between the sixth side of the data line on the substrate and the first side of the semiconductor layer on the substrate.

8. The display device of claim 1 , wherein the second conductive layer further comprises a circuit line, the second interval is between one side of the circuit line and the first side of the semiconductor layer.

9. The display device of claim 1 , wherein the second interval is in a range from 0.7 μm to 2.0 μm.

10. The display device of claim 1 , wherein the first interval is in a range from 0.3 μm to 1.5 μm.

11. The display device of claim 1 , wherein a shape profile of the third side of the second conductive layer is the same as a shape profile of the first side of the semiconductor layer.

12. The display device of claim 1 , wherein the second conductive layer and the semiconductor layer are patterned with a gray tone mask.

Assignees

• Innolux Corp

Inventors

• Chang Jung-Fang
• Wu Chih-Hao
• Wang Chao-Hsiang
• Chen Yi-Ching

Classifications

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10D30/6757 Primary

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title

• H01L27/124

  Electricity · mapped topic