Adaptive equalization circuit, digital coherent receiver, and adaptive equalization method

Patent metadata

Field	Value
Publication number	US-9680667-B2
Application number	US-201615203004-A
Country	US
Kind code	B2
Filing date	Jul 6, 2016
Priority date	Jul 9, 2015
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

A circuit includes a calculation circuit configured to calculate a noise power of a predetermined-training-sequence pattern repeatedly included in a first signal input into an adaptive equalizer, based on a second signal obtained by compensating the first signal by a compensation circuit, a channel-estimation value based on the second signal, and the predetermined-training-sequence pattern; and an average circuit configured to obtain an average value of estimation values of frequency offsets based on the predetermined-training-sequence pattern having the noise power equal to or smaller than a predetermined power, among estimation values of frequency offsets based on the predetermined-training-sequence pattern, wherein the compensation circuit is configured to compensate a frequency offset of the predetermined-training sequence pattern based on the average value and thereby obtain the second signal, and the adaptive equalizer is configured to perform adaptive-equalization processing of the first signal with a setting value based on the second signal.

First claim

What is claimed is:

1. An adaptive equalization circuit, comprising:
a calculation circuit configured to calculate a noise power of a predetermined training sequence pattern repeatedly included in a first signal input into an adaptive equalizer, based on a second signal obtained by compensating the first signal by a compensation circuit, a channel estimation value based on the second signal, and the predetermined training sequence pattern; and
an average circuit configured to obtain an average value of estimation values of frequency offsets based on the predetermined training sequence pattern having the noise power equal to or smaller than a predetermined power, among estimation values of frequency offsets based on the predetermined training sequence pattern, wherein
the compensation circuit is configured to compensate a frequency offset of the predetermined training sequence pattern based on the average value and thereby obtain the second signal, and
the adaptive equalizer is configured to perform adaptive equalization processing of the first signal with a setting value based on the second signal.

2. The adaptive equalization circuit according to claim 1 , wherein the average circuit is configured to exclude, from the estimation values of the frequency offsets based on the predetermined training sequence pattern repeatedly included, the estimation value of the frequency offset based on the predetermined training sequence pattern with the noise power higher than a predetermined power, and obtain an average value of the estimation values of the frequency offsets based on the predetermined training sequence pattern with the noise power equal to or smaller than the predetermined power.

3. The adaptive equalization circuit according to claim 1 , wherein the average circuit is configured to determine an average value of a predetermined number of the estimation values when the number of the estimation values reaches the predetermined number.

4. The adaptive equalization circuit according to claim 3 , further comprising a control circuit configured to perform control of discarding the estimation values when a count of determinations on whether or not the noise power is equal to or smaller than the predetermined power reaches a threshold that is larger than the predetermined number.

5. The adaptive equalization circuit according to claim 4 , further comprising an acquisition circuit configured to estimate positions of the predetermined training sequence pattern in the first signal and acquire the predetermined training sequence pattern from the first signal based on the estimated positions, wherein
the calculation circuit is configured to calculate the noise power based on the acquired the predetermined training sequence pattern;
the average circuit is configured to hold the estimation values of the frequency offsets based on the predetermined training sequence pattern having the noise power equal to or smaller than the predetermined power, among the estimation values of the frequency offsets based on the acquired predetermined training sequence pattern; and
the control circuit is configured to, when the count of determinations on whether or not the noise power is equal to or smaller than the predetermined power reaches the threshold, control of discarding the estimation values and re-estimating the positions of the acquired predetermined training sequence pattern.

6. The adaptive equalization circuit according to claim 3 , further comprising a control circuit configured to discard the estimation values when a count of determinations that the noise power is larger than the predetermined power reaches a threshold.

7. The adaptive equalization circuit according to claim 6 , further comprising an acquisition circuit configured to estimate positions of the predetermined training sequence pattern included in the first signal and acquire the predetermined training sequence pattern from the first signal based on the estimated positions, wherein
the calculation circuit is configured to calculate the noise power based on the predetermined training sequence pattern,
the average circuit is configured to obtain an average value of the estimation values of the frequency offsets based on the predetermined training sequence pattern having the noise power equal to or lower than the predetermined power, among the estimation values of the frequency offsets based on the acquired predetermined training sequence pattern, and
the control circuit is configured to, when the count of determinations that the noise power is larger than the predetermined power reaches the threshold, perform control of discarding the estimation values and re-estimating the positions of the acquired predetermined training sequence pattern.

8. The adaptive equalization circuit according to claim 1 , wherein the adaptive equalizer performs the adaptive equalization processing with a finite impulse response (FIR) filter configured to perform a filtering according to a set tap coefficient, and sets an initial value of the tap coefficient based on the predetermined training sequence pattern whose frequency offsets are compensated.

9. The adaptive equalization circuit according to claim 8 , wherein the adaptive equalizer is configured to set, as the initial value, a tap coefficient calculated from the channel estimation values based on the predetermined training sequence pattern whose frequency offsets are compensated.

10. The adaptive equalization circuit according to claim 1 , wherein
the calculation circuit, the average circuit, the compensation circuit, and the adaptive equalization circuit are included in a digital circuit, and
the digital circuit is configured to include a field programmable gate array and/or a digital signal processor.

11. A digital coherent receiver, comprising:
a received light processing circuit configured to perform photoelectric conversion and digital conversion of light obtained by mixing signal light and local oscillation light;
a calculation circuit configured to calculate a noise power of a predetermined training sequence pattern repeatedly included in a first signal obtained by the received light processing circuit, based on a second signal obtained by compensating the predetermined training sequence pattern by a compensation circuit, a channel estimation value based on the second signal, and the predetermined training sequence pattern;
an average circuit configured to obtain an average value of estimation values of frequency offsets based on the predetermined training sequence pattern having the noise power equal to or smaller than a predetermined power, among estimation values of frequency offsets based on the predetermined training sequence pattern, the compensation circuit being configured to compensate a frequency offset of the predetermined training sequence pattern based on the average value and thereby obtain the second signal;
an adaptive equalizer configured to perform adaptive equalization processing of the first signal obtained by the received light processing circuit, with a setting value based on the second signal; and
a decode circuit configured to perform decoding based on the first signal resultant from the adaptive equalization processing by the adaptive equalizer.

12. An adaptive equalization method comprising:
calculating, by a digital circuit, a noise power of a predetermined training sequence pattern repeatedly included in a first signal, based on a second signal obtained by compensating the predetermined training sequence pattern, a channel estimation value based on the second signal, and the predetermined training sequence pattern;
obtaining, by the digital circuit, an av

Assignees

• Fujitsu Ltd

Inventors

• Sasaki Daisuke
• Hatae Kazuhiko
• Katou Tomoki
• Koizumi Nobukazu
• Oota Masato
• Ohtomo Yasuo
• Yamazaki Manabu
• Sato Masashi

Classifications

• H04L25/0224

  using sounding signals · CPC title

• H04L2025/03681

  Control of adaptation · CPC title

• H04B10/6164

  Estimation or correction of the frequency offset between the received optical signal and the optical local oscillator · CPC title

• H04B10/6162

  Compensation of polarization related effects, e.g., PMD, PDL · CPC title

• H04L25/03019 Primary

  adaptive, i.e. capable of adjustment during data reception · CPC title