Systems and methods for symbol time tracking

Patent metadata

Field	Value
Publication number	US-9680632-B2
Application number	US-201514863082-A
Country	US
Kind code	B2
Filing date	Sep 23, 2015
Priority date	Feb 12, 2015
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

A method for communications is described. The method includes determining a symbol timing drift elimination amount for a received signal. The method further includes eliminating part of the symbol timing drift by adjusting a reference clock for the modem. Determining the symbol timing drift elimination amount may be based on at least one of a symbol timing drift estimate, a symbol timing error, a packet acquisition indicator, a packet validity indicator, demodulated bits or a carrier presence indicator.

First claim

What is claimed is:

1. A method for communications, comprising:
determining a symbol timing drift elimination amount for a received signal based on a comparison of demodulated bits with demodulated bits expected for a positive symbol timing drift case and demodulated bits expected for a negative symbol timing drift case; and
eliminating part of a symbol timing drift based on the symbol timing drift elimination amount by adjusting a reference clock for a modem.

2. The method of claim 1 , wherein determining the symbol timing drift elimination amount is further based on at least one of a symbol timing drift estimate, a symbol timing error, a packet acquisition indicator, a packet validity indicator, and a carrier presence indicator.

3. The method of claim 1 , wherein determining the symbol timing drift elimination amount comprises trying different amounts of symbol timing drift elimination until packets are acquired and demodulated without an error.

4. The method of claim 1 , wherein eliminating part of the symbol timing drift comprises increasing or decreasing the reference clock by a fixed frequency or a fixed ratio.

5. The method of claim 1 , wherein eliminating part of the symbol timing drift comprises periodically enabling and disabling clock division or multiplication for the reference clock.

6. The method of claim 1 , wherein adjusting the reference clock for the modem is performed in an analog block of a receiver.

7. The method of claim 1 , wherein the method is performed by a near-field communication (NFC) device, and wherein a reference for the reference clock is obtained from a field transmitted by a remote NFC device.

8. A method for communication, comprising:
determining a symbol timing drift elimination amount for a received signal;
determining a symbol timing drift estimate of the received signal;
determining that the symbol timing drift estimate is greater than a tolerable amount for a time tracking block of a modem;
setting the symbol timing drift elimination amount based on the symbol timing drift estimate; and
eliminating part of a symbol timing drift by adjusting a reference clock for the modem.

9. A wireless communication device, comprising:
a processor;
a memory in communication with the processor; and
instructions stored in the memory, the instructions executable by the processor to:
determine a symbol timing drift elimination amount for a received signal based on a comparison of demodulated bits with demodulated bits expected for a positive symbol timing drift case and demodulated bits expected for a negative symbol timing drift case; and
eliminate part of a symbol timing drift based on the symbol timing drift elimination amount by adjusting a reference clock for a modem.

10. The wireless communication device of claim 9 , wherein determining the symbol timing drift elimination amount is further based on at least one of a symbol timing drift estimate, a symbol timing error, a packet acquisition indicator, a packet validity indicator, and a carrier presence indicator.

11. The wireless communication device of claim 9 , wherein the instructions executable to determine the symbol timing drift elimination amount comprise instructions executable to try different amounts of symbol timing drift elimination until packets are acquired and demodulated without an error.

12. The wireless communication device of claim 9 , wherein the instructions executable to eliminate part of the symbol timing drift comprise instructions executable to increase or decrease the reference clock by a fixed frequency or a fixed ratio.

13. The wireless communication device of claim 9 , wherein the instructions executable to eliminate part of the symbol timing drift comprise instructions executable to periodically enable and disable clock division or multiplication for the reference clock.

14. A wireless communication device, comprising:
a processor;
a memory in communication with the processor; and
instructions stored in the memory, the instructions executable by the processor to:
determine a symbol timing drift elimination amount for a received signal;
determine a symbol timing drift estimate of the received signal;
determine that the symbol timing drift estimate is greater than a tolerable amount for a time tracking block of a modem;
set the symbol timing drift elimination amount based on the symbol timing drift estimate; and
eliminate part of a symbol timing drift by adjusting a reference clock for the modem.

15. A computer-program product for communications, the computer-program product comprising a non-transitory computer-readable medium having instructions thereon, the instructions comprising:
code for causing a computer to determine a symbol timing drift elimination amount for a received signal based on a comparison of demodulated bits with demodulated bits expected for a positive symbol timing drift case and demodulated bits expected for a negative symbol timing drift case; and
code for causing the computer to eliminate part of a symbol timing drift based on the symbol timing drift elimination amount by adjusting a reference clock for a modem.

16. The computer-program product of claim 15 , wherein the code for causing the computer to determine the symbol timing drift elimination amount is further based on at least one of a symbol timing drift estimate, a symbol timing error, a packet acquisition indicator, a packet validity indicator, and a carrier presence indicator.

17. The computer-program product of claim 15 , wherein the code for causing the computer to determine the symbol timing drift elimination amount comprises code for causing the computer to try different amounts of symbol timing drift elimination until packets are acquired and demodulated without an error.

18. The computer-program product of claim 15 , wherein the code for causing the computer to eliminate part of the symbol timing drift comprises code for causing the computer to increase or decrease the reference clock by a fixed frequency or a fixed ratio.

19. The computer-program product of claim 15 , wherein the code for causing the computer to eliminate part of the symbol timing drift comprises code for causing the computer to periodically enable and disable clock division or multiplication for the reference clock.

20. A computer-program product for communications, the computer-program product comprising a non-transitory computer-readable medium having instructions thereon, the instructions comprising:
code for causing a computer to determine a symbol timing drift elimination amount for a received signal;
code for causing the computer to determine a symbol timing drift estimate of the received signal;
code for causing the computer to determine that the symbol timing drift estimate is greater than a tolerable amount for a time tracking block of a modem;
code for causing the computer to set the symbol timing drift elimination amount based on the symbol timing drift estimate; and
code for causing the computer to eliminate part of a symbol timing drift by adjusting a reference clock for the modem.

Assignees

• Qualcomm Inc

Inventors

• Kang Eunmo
• Mofidi Mahbod
• Denboer Paul
• Deng Xiao
• Banthia Ashish Subhash
• So Vincent
• Meka Vikram

Classifications

• H04L7/0087 Primary

  Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection · CPC title

• H04L7/0037 Primary

  Delay of clock signal · CPC title

• H04L7/10

  Arrangements for initial synchronisation · CPC title

• H04L7/00 Primary

  Arrangements for synchronising receiver with transmitter {(synchronisation of generators of electric oscillations or pulses H03L7/00)} · CPC title

• H04B5/266

  One coil at each side, e.g. with primary and secondary coils · CPC title