Semiconductor dies with recesses, associated leadframes, and associated systems and methods

Patent metadata

Field	Value
Publication number	US-9679834-B2
Application number	US-201615001070-A
Country	US
Kind code	B2
Filing date	Jan 19, 2016
Priority date	Jul 24, 2007
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one embodiment includes a semiconductor die having a first surface and a second surface facing opposite from the first surface, with the first surface having a die recess. The system can further include a support paddle carrying the semiconductor die, with at least part of the support paddle being received in the die recess. In particular embodiments, the support paddle can form a portion of a leadframe. In other particular embodiments, the support paddle can include a paddle surface that faces toward the semiconductor die and has an opening extending through the paddle surface and through the support paddle.

First claim

We claim:

1. A semiconductor system, comprising:
a leadframe that includes:
a frame member;
a plurality of leadfingers connected to and extending inwardly from the frame member; and
a support paddle positioned inwardly from the leadfingers, the support paddle having:
a first paddle portion connected to the frame member by a first removable tie and positioned inwardly from the frame member, the first paddle portion having a first support surface positioned to carry a semiconductor die, the first removable tie being narrower than at least one of the leadfingers;
a second paddle portion connected to and positioned inwardly from the frame member, the second paddle portion being spaced apart from the first paddle portion and having a second paddle support surface spaced apart from and discontinuous with the first paddle support surface and positioned to carry the semiconductor die;
a third paddle portion connected to and positioned inwardly from the frame member, the third paddle portion being spaced apart from the first and second paddle portions and having a third paddle support surface spaced apart from the first and second paddle support surfaces and positioned to carry the semiconductor die; and
a fourth paddle portion connected to and positioned inwardly from the frame member, the fourth paddle portion being spaced apart from the first, second and third paddle portions and having a fourth paddle support surface spaced apart from the first, second and third paddle support surfaces and positioned to carry the semiconductor die.

2. The system of claim 1 , wherein:
the semiconductor die is a first semiconductor die wherein the first semiconductor die has bond sites; and
the system further comprises:
a second semiconductor die stacked relative to the first semiconductor die, the second semiconductor die having a first surface facing toward the first semiconductor die, a second surface facing away from the first surface, and two elongated die recesses extending along opposing edges of the first surface of the second semiconductor die; and
wire bonds received in the recesses of the second semiconductor die and connected to the bond sites of the first semiconductor die.

3. The system of claim 1 , further comprising an encapsulant disposed around at least a portion of the semiconductor die and at least a portion of the support paddle.

4. The system of claim 1 , wherein the semiconductor die includes multiple die bond sites, and wherein the plurality of leadfingers have leadfinger bond sites, with individual leadfinger bond sites connected to corresponding die bond sites via wire bonds, wherein the leadfingers and the support paddle have a generally identical composition.

5. The system of claim 1 wherein the semiconductor die is a first semiconductor die having first semiconductor die bond sites and a first die recess, and wherein the system further comprises:
a second semiconductor die stacked relative to the first semiconductor die, the second semiconductor die having a first surface and a second surface facing opposite from the first surface, the first surface of the second semiconductor die having a second die recess; and
wherein the plurality of leadfingers have leadfinger bond sites, with individual leadfinger bond sites connected to corresponding die bond sites of the first semiconductor die via wirebonds that are received in the second die recesses of the second semiconductor die.

6. The system of claim 1 wherein the first, second, third and fourth paddle support surfaces are generally co-planar.

7. The system of claim 1 wherein a diagonal line between the first and third paddle support surfaces bisects a diagonal line between the second and fourth paddle support surfaces.

8. The system of claim 1 wherein the first and second paddle portions are spaced apart from each other by an opening.

9. The system of claim 1 wherein the semiconductor die and the support paddle are spaced apart from all exterior surfaces of an encapsulant encapsulating the semiconductor die and the support paddle.

10. A method for manufacturing a semiconductor system, comprising:
receiving at least part of a support paddle in a recess of a semiconductor die, the semiconductor die having a first surface with the recess and a second surface facing opposite from the first surface, the recess including at least one recess at four spaced apart corners of the semiconductor die such that four spaced apart paddle surfaces of the support paddle are received in individual portions of the at least one recess at the four spaced apart corners of the semiconductor die, and at least one removable tie connected to and narrower than one of the paddle surfaces;
attaching the support paddle to the semiconductor die with the support paddle in the recess; and
separating the at least one removable tie from the one of the paddle surfaces.

11. The method of claim 10 wherein the support paddle is a portion of a leadframe having a frame portion and a plurality of leadfingers extending from the frame portion, and wherein the method further comprises:
positioning the leadfingers proximate to the semiconductor die as the support paddle is received in the recess;
electrically connecting the leadfingers with bond sites of the semiconductor die using wirebonds;
disposing an encapsulant around the semiconductor die and the leadframe; and
removing the frame portion of the leadframe.

12. The method of claim 11 wherein receiving at least part of the support paddle in the recess of the semiconductor die includes receiving the support paddle with an outwardly facing surface of the support paddle flush with or recessed from the first surface of the semiconductor die adjacent to the recess.

13. The method of claim 11 wherein the recess is a first recess and wherein receiving at least part of the support paddle includes receiving a first portion of the support paddle in the first recess and wherein the method further comprises receiving a second portion of the support paddle in a second recess spaced apart from the first recess.

14. The method of claim 10 wherein attaching the support paddle includes attaching the four spaced apart paddle surfaces of the support paddle to surfaces of the semiconductor die.

15. The method of claim 10 wherein attaching the support paddle to the semiconductor die includes attaching the four spaced apart paddle surfaces of the support paddle to corresponding portions of the semiconductor die.

16. The method of claim 10 , further comprising encapsulating the semiconductor die and the support paddle in an encapsulant such that all sides of the support paddle facing away from the semiconductor die are covered by the encapsulant.

17. The method of claim 10 wherein at least one of the paddle surfaces of the support paddle is generally flush with or recessed from the first surface of the semiconductor die external to the recess of the semiconductor die.

Assignees

• Micron Technology Inc

Inventors

• Kwang Chua Swee
• Chia Yong Poo

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/951

  Materials of bond pads · CPC title