Semiconductor structure and process for forming plug including layer with pulled back sidewall part

Patent metadata

Field	Value
Publication number	US-9679813-B2
Application number	US-201514710583-A
Country	US
Kind code	B2
Filing date	May 12, 2015
Priority date	May 12, 2015
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

A semiconductor process for forming a plug includes the following steps. A dielectric layer having a recess is formed on a substrate. A titanium layer is formed to conformally cover the recess. A first titanium nitride layer is formed to conformally cover the titanium layer, thereby the first titanium nitride layer having first sidewall parts. The first sidewall parts of the first titanium nitride layer are pulled back, thereby second sidewall parts being formed. A second titanium nitride layer is formed to cover the recess. Moreover, a semiconductor structure formed by said semiconductor process is also provided.

First claim

What is claimed is:

1. A semiconductor structure for forming a plug,
comprising:
a metal gate disposed on a substrate;
a dielectric layer having a recess located on the substrate beside the metal gate;
a titanium layer conformally covering surfaces of the recess, thereby the titanium layer having sidewall parts;
a first titanium nitride layer conformally covering the titanium layer, wherein the first titanium nitride layer has second sidewall parts, and top surfaces of the second sidewall parts are lower than a top surface of the dielectric layer; and
a second titanium nitride layer conformally covering surfaces of the recess, the titanium layer and the first titanium nitride layer; and
a conductive material filling up the recess and on the second titanium nitride layer.

2. The semiconductor structure for forming a plug according to claim 1 , wherein the plug comprises a contact plug or a via plug.

3. The semiconductor structure for forming a plug according to claim 1 , further comprising:
a metal silicide disposed in the substrate at a bottom of the recess.

4. The s semiconductor structure for forming a plug according to claim 1 , wherein the second titanium nitride layer has a step cross-sectional profile in the recess.

5. The semiconductor structure for forming a plug according to claim 1 , wherein the second sidewall parts have heights 0.4-0.6 times a height of the recess.

6. The semiconductor structure for forming a plug according to claim 1 ,
wherein the conductive material has a T-shaped cross-sectional profile in the recess.

7. The semiconductor structure for forming a plug according to claim 1 , wherein the sidewall parts of the titanium layer has top surfaces trimmed with the top surfaces of the second sidewall parts.

8. The semiconductor structure for forming a plug according to claim 1 , wherein the second titanium nitride layer has a thickness less than one third a thickness of the first titanium nitride layer.

Assignees

• United Microelectronics Corp

Inventors

• Chen pin-hong
• Lai Kuo-Chih
• Hsu Chia Chang
• Chiu Chun-Chieh
• Chen Li-Han
• Huang Shu Min
• Tsai Min-Chuan
• Huang Hsin-Fu
• Hsu Chi-Mao

Classifications

• H10P14/418

  the conductive layers comprising transition metals · CPC title

• H10D64/0112

  using conductive layers comprising silicides · CPC title

• H10W20/0698

  Local interconnections · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title