Method for removing hydrogen from oxide semiconductor layer having insulating layer containing halogen element formed thereover

Patent metadata

Field	Value
Publication number	US-9679768-B2
Application number	US-201414551754-A
Country	US
Kind code	B2
Filing date	Nov 24, 2014
Priority date	Oct 21, 2009
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. An impurity such as hydrogen or moisture (e.g., a hydrogen atom or a compound containing a hydrogen atom such as H 2 O) is eliminated from an oxide semiconductor layer with use of a halogen element typified by fluorine or chlorine, so that the impurity concentration in the oxide semiconductor layer is reduced. A gate insulating layer and/or an insulating layer provided in contact with the oxide semiconductor layer can be formed to contain a halogen element. In addition, a halogen element may be attached to the oxide semiconductor layer through plasma treatment under an atmosphere of a gas containing a halogen element.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device comprising the steps of:
forming a first oxide insulating layer over a gate electrode;
forming an oxide semiconductor layer over the first oxide insulating layer, wherein the oxide semiconductor layer overlaps with the gate electrode;
performing plasma treatment on the oxide semiconductor layer under an atmosphere of a gas containing a halogen element;
forming a second oxide insulating layer over the oxide semiconductor layer, the second oxide insulating layer containing silicon, oxygen, and the halogen element;
forming a source electrode and a drain electrode over the second oxide insulating layer, the source electrode and the drain electrode being electrically connected to the oxide semiconductor layer; and
heating the oxide semiconductor layer.

2. The method according to claim 1 , wherein the halogen element is added during deposition of the second oxide insulating layer.

3. The method according to claim 1 , wherein the oxide semiconductor layer is in contact with the second oxide insulating layer.

4. The method according to claim 1 , wherein the oxide semiconductor layer contains hydrogen at a concentration of 5×10 19 atoms/cm 3 or lower.

5. The method according to claim 1 , wherein the second oxide insulating layer contains the halogen element at a concentration of 5×10 18 atoms/cm 3 or higher.

6. The method according to claim 1 , wherein the oxide semiconductor layer is non-single crystalline.

7. The method according to claim 1 , wherein the step of heating is performed at a temperature of 100° C. to 400° C.

8. The method according to claim 1 , further processing the oxide semiconductor layer into an island shape before performing the plasma treatment.

9. A method of manufacturing a semiconductor device comprising the steps of:
forming a first oxide insulating layer over a gate electrode;
forming an oxide semiconductor layer over the first oxide insulating layer, wherein the oxide semiconductor layer overlaps with the gate electrode;
performing plasma treatment on the oxide semiconductor layer under an atmosphere of a gas containing fluorine;
forming a second oxide insulating layer over the oxide semiconductor layer;
forming a source electrode and a drain electrode over the second oxide insulating layer, the source electrode and the drain electrode being electrically connected to the oxide semiconductor layer;
forming a silicon nitride layer over the source electrode and the drain electrode; and
heating the oxide semiconductor layer at a temperature of 100° C. or higher after forming the second oxide insulating layer,
wherein the second oxide insulating layer contains silicon, oxygen, and fluorine.

10. The method according to claim 9 , wherein fluorine is added to the second oxide insulating layer after forming the second oxide insulating layer.

11. The method according to claim 9 , wherein fluorine is added to the second oxide insulating layer during forming the second oxide insulating layer.

12. The method according to claim 9 , wherein the oxide semiconductor layer contains hydrogen at a concentration of 5×10 19 atoms/cm 3 or lower.

13. The method according to claim 9 , wherein the second oxide insulating layer contains fluorine at a concentration of 5×10 18 atoms/cm 3 or higher.

14. The method according to claim 9 , wherein the oxide semiconductor layer is non-single crystalline.

15. The method according to claim 9 , further processing the oxide semiconductor layer into an island shape before performing the plasma treatment.

16. A method of manufacturing a semiconductor device comprising the steps of:
forming an oxide semiconductor layer over a substrate;
performing plasma treatment on the oxide semiconductor layer under an atmosphere of a gas containing fluorine;
forming an oxide insulating layer containing silicon and oxygen on the oxide semiconductor layer;
adding fluorine to the oxide insulating layer;
forming a source electrode and a drain electrode over the oxide insulating layer, the source electrode and the drain electrode being electrically connected to the oxide semiconductor layer; and
performing a heat treatment after the step of adding fluorine at a temperature of 100° C. or higher.

17. The method according to claim 16 , wherein the oxide semiconductor layer contains hydrogen at a concentration of 5×10 19 atoms/cm 3 or lower.

18. The method according to claim 16 , wherein the oxide semiconductor layer is non-single crystalline.

19. The method according to claim 16 , wherein the oxide semiconductor layer has a thickness of greater than or equal to 2 nm and less than or equal to 200 nm.

20. The method according to claim 16 , further processing the oxide semiconductor layer into an island shape before performing the plasma treatment.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Suzuki Kunihiko
• Takahashi Masahiro

Classifications

• H10P14/3426

  Oxides · CPC title

• H10P14/22

  using physical deposition, e.g. vacuum deposition or sputtering · CPC title

• H10P14/3434 Primary

  being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

• H10W42/00

  Arrangements for protection of devices (arrangements for thermal protection H10W40/00) · CPC title

• H10P14/38 Primary

  characterised by treatments done after the formation of the materials · CPC title