Packages with molding material forming steps

US9673184B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9673184-B2
Application numberUS-201514609221-A
CountryUS
Kind codeB2
Filing dateJan 29, 2015
Priority dateMar 14, 2013
Publication dateJun 6, 2017
Grant dateJun 6, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion overlapping the second package component, wherein the first portion includes a first top surface, and a second portion encircling the first portion and molding bottom portions of the plurality of electrical connectors therein. The second portion has a second top surface lower than the first top surface.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: placing a mold chase over a package substrate, wherein the mold chase comprises a recess extending from a bottom surface of the mold chase into the mold chase; pressing the package substrate against a release film placed to the bottom surface of the mold chase and extending into the recess, wherein a solder region of the package substrate is outside the recess, and an upper portion of the solder region at a top surface of the package substrate is pressed into the release film, and a lower portion of the solder region is left outside of the release film; injecting a molding material into a space between the release film and the package substrate, wherein the lower portion of the solder region is in the molding material, and the molding material contacts a top surface of a metal feature underlying the solder region, and the top surface of the metal feature is further in contact with the solder region; curing the molding material; and removing the mold chase. 2. The method of claim 1 further comprising, before the placing the mold chase, bonding a die to the top surface of the package substrate, wherein the recess overlaps a first portion of the die. 3. The method of claim 2 , wherein the recess further comprises a second portion vertically misaligned from the die. 4. The method of claim 2 , wherein the recess has a top-view area greater than a top-view area of the die. 5. The method of claim 2 , wherein after the removing the mold chase, a portion of the molding material overlapping the die has curved top surfaces. 6. The method of claim 1 , wherein the package substrate is one of a plurality of package substrates comprised in a package substrate strip, and the mold chase comprises a plurality of recesses, each being over and aligned to one of a plurality of device dies bonded to the plurality of package substrates. 7. The method of claim 6 further comprising, after the removing the mold chase, sawing the package substrate strip and the molding material to separate the plurality of package substrates from each other. 8. The method of claim 1 , wherein a lower portion of the solder region is molded in the molding material, and a top portion of the solder region protrudes higher than a top surface of the molding material. 9. The method of claim 1 , wherein the recess comprises slanted sidewalls un-perpendicular to the bottom surface of the mold chase. 10. The method of claim 1 , wherein the recess has a depth greater than about 30 μm. 11. A method comprising: bonding a device die to a top surface of a package component, wherein the package component further comprises an electrical connector at the top surface; placing a release film on a mold chase, wherein the mold chase comprises a recess, and the release film comprises a first portion outside of the recess, and a second portion inside the recess; pressing the package component against the first portion of the release film until a portion of the electrical connector is in the release film; injecting a molding material between the release film, the device die, and the package component to mold the device die, wherein the molding material comprises: a first portion higher than the device die, wherein the first portion comprises a first top surface and a slanted sidewall higher than a top surface of the device die, and wherein the slanted sidewall is between an edge of the device die and a nearest electrical connector adjacent to the device die; and a second portion at a same level as, and encircling the first portion and molding a bottom portion of the electrical connector therein, wherein the second portion of the molding material comprises a second top surface lower than the first top surface. 12. The method of claim 11 , wherein the first top surface and the second top surface of the molding material are formed simultaneously. 13. The method of claim 11 , wherein the device die is vertically aligned to a central portion of the recess. 14. The method of claim 13 , wherein the recess further comprises outer portions vertically misaligned to the device die. 15. The method of claim 11 , wherein substantially an entirety of the first top surface of the first portion of the molding material is curved. 16. A method comprising: bonding a plurality of dies to a plurality of package substrates of a package substrate strip; adhering a release film onto first bottom surfaces and second bottom surfaces of a mold chase, wherein the mold chase comprises a plurality of recesses, with the first bottom surfaces being curved and in the plurality of recesses, and the second bottom surfaces being outside of, and between, the plurality of recesses, wherein the second bottom surfaces are lower than the first bottom surfaces; placing the mold chase over the package substrate strip, wherein each of the plurality of recesses is aligned to one of the plurality of dies; pressing the mold chase and the release film against a plurality of electrical connectors that is over and bonded to the plurality of package substrates, wherein top portions of the plurality of electrical connectors are pressed into the release film, and wherein bottom portions of the plurality of electrical connectors are outside of the release film, and the plurality of electrical connectors is outside of the plurality of recesses; injecting a molding material between the mold chase and the package substrate strip; curing the molding material; and removing the mold chase. 17. The method of claim 16 , wherein after the injecting the molding material, the molding material comprises: a first portion overlapping one of the plurality of dies, wherein the first portion comprises a first top surface; and a second portion encircling bottom portions of a plurality of electrical connectors of the plurality of package substrates. 18. The method of claim 16 , wherein the plurality of recesses has depths greater than about 30 μm. 19. The method of claim 16 , wherein one of the plurality of recesses has a top-view area greater than a top-view area of one of the plurality of dies. 20. The method of claim 16 further comprising: after the mold chase is removed, sawing the package substrate strip and the molding material into a plurality of bottom packages; and bonding a top package to one of the plurality of bottom packages.

Assignees

Inventors

Classifications

  • Cutting or separating of wafers, substrates or parts of devices · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • the stacked chips being of the same size without any chips being laterally offset, e.g. chip stacks having a rectangular shape · CPC title

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Frequently asked questions

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What does patent US9673184B2 cover?
A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion ov…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W70/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 06 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).