Electro-optic displays, and materials for use therein
US-9152004-B2 · Oct 6, 2015 · US
US9671635B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9671635-B2 |
| Application number | US-201514615617-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 6, 2015 |
| Priority date | Feb 7, 2014 |
| Publication date | Jun 6, 2017 |
| Grant date | Jun 6, 2017 |
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Official abstract text for this publication.
This invention relates to an electro-optic display having a backplane with a front surface and a reverse surface on opposed sides of the backplane, a front surface having a plurality of pixel electrodes arranged in a matrix of columns and rows with column and row lines, a reverse surface having at least one driver chip, and conductive vias electrically connecting the column and row lines on the front surface to the driver chip on the reverse surface, such that the entire front surface area may be optically active.
Opening claim text (preview).
The invention claimed is: 1. An electro-optic display having a backplane, the backplane comprising: a substrate having a first major surface comprising a plurality of pixel electrodes arranged in an array of rows and columns having row and column lines, the pixel electrodes covering at least 95% of the first major surface; the substrate having a second major surface opposed to the first major surface, the second major surface having a first driver chip; and a first plurality of conductive vias electrically connecting the row lines of the pixel array through the substrate to the first driver chip. 2. The display of claim 1 further comprising a second plurality of conductive vias electrically connecting the column lines of the pixel array to the first driver chip. 3. The display of claim 1 further comprising: a second driver chip on the second major surface; and a plurality of second conductive vias electrically connecting the column lines of the pixel array to a second driver chip. 4. The display of claim 1 , wherein the backplane is a printed circuit board, a flex circuit, or a substrate of printed layers. 5. The display of claim 1 , wherein each of the plurality of pixel electrodes has a thin-film transistor associated therewith. 6. The display of claim 1 , wherein the pixel size is between 3 mm×3 mm and 5 mm×5 mm. 7. An assembly comprising a plurality of displays of claim 1 . 8. The assembly of claim 7 , wherein each of the plurality of displays is interconnected. 9. The assembly of claim 8 , wherein the assembly is configured to display a contiguous image across multiple displays.
Combining plural substrates to produce large-area displays, e.g. tiled displays · CPC title
Arrangements for providing conduction through an insulating substrate · CPC title
for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title
Conductors connecting driver circuitry and terminals of panels · CPC title
Integration of the drivers onto the display substrate · CPC title
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