Passive alignment of polymer waveguides

Patent metadata

Field	Value
Publication number	US-9671577-B2
Application number	US-201514848585-A
Country	US
Kind code	B2
Filing date	Sep 9, 2015
Priority date	Sep 9, 2015
Publication date	Jun 6, 2017
Grant date	Jun 6, 2017

Abstract

A chip packaging includes a first part comprising a support; and a core polymer layer transversally structured so as to exhibit distinct residual portions comprising: first waveguide cores each having a first height and disposed within said inner region; and one or more first alignment structures disposed within said outer region. A second part of the packaging comprises: second waveguide cores, each having a same second height; and one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures, and wherein, the first part structured such that said inner region is recessed with respect to the outer region, to enable: the second waveguide cores to contact the first waveguide cores; and the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures. The invention is further directed to related passive alignment methods.

First claim

The invention claimed is:

1. A chip packaging comprising a first part and a second part, wherein
the first part comprises:
a support; and
a core polymer layer extending over an inner region and an outer region of the support, the core polymer layer transversally structured so as to exhibit distinct residual portions, each having a same first height, which corresponds to a thickness of the core polymer layer, the residual portions comprising:
first waveguide cores disposed within said inner region; and
one or more first alignment structures disposed within said outer region,

the second part comprises:
second waveguide cores, each having a same second height; and
one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures,

wherein the first part is structured such that said inner region is recessed with respect to the outer region, to enable:
the second waveguide cores to contact the first waveguide cores; and
the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures;

and wherein the inner region and the outer region are each planar and structurally contiguous.

2. The chip packaging of claim 1 , wherein the first part is structured such that a top surface of the one or more first alignment structures lies in a first plane and a top surface of the first waveguide cores lies in a second plane, parallel to and at a distance from the first plane, said distance larger than the sum of said first height and said second height.

3. The chip packaging of claim 1 , wherein the support comprises a support and a polymer cladding layer extending over the support, said inner region defined on the polymer cladding layer.

4. The chip packaging of claim 1 , wherein the support is a deformable support, shaped so as for said inner region to be recessed with respect to the outer region.

5. The chip packaging of claim 3 , wherein the core polymer layer extends over the polymer cladding layer, said inner region and outer region being, each, defined directly on the polymer cladding layer.

6. The chip packaging of claim 1 , wherein the chip packaging is a silicon photonics chip packaging, the second part is a silicon photonics chip and the second waveguide cores are silicon-on insulator waveguide cores.

7. The chip packaging of claim 1 , wherein the first waveguide cores extend parallel to each other and the second waveguide cores extend parallel to each other.

8. The chip packaging of claim 7 , wherein the first waveguide cores and the second waveguide cores are configured so as to enable an adiabatic coupling between the first waveguide cores and the second waveguide cores.

9. The chip packaging of claim 8 , wherein each of the second waveguide cores exhibits a tapered portion.

10. The chip packaging of claim 1 , wherein each of the one or more first alignment structures are longitudinal structures at least partly inserted into the one or more second alignment structures.

11. The chip packaging of claim 10 , wherein the chip packaging comprises at least two first alignment structures and at least two second alignment structures.

12. The chip packaging of claim 1 , wherein the second part comprises a silicon support with a buried oxide layer.

13. The chip packaging of claim 12 , wherein the one or more second alignment structures are provided as cavities open at the level of the buried oxide layer and extending into a thickness of the silicon support.

14. A method for passively aligning two parts of a chip packaging, the method comprising:
providing a first part and a second part of a chip packaging, wherein:
the first part comprises:
a deformable support; and
a core polymer layer extending over an inner region and an outer region of the deformable support, the core polymer layer transversally structured so as to exhibit distinct residual portions, each having a same first height, which corresponds to a thickness of the core polymer layer, the residual portions comprising:
first waveguide cores disposed within said inner region; and
one or more first alignment structures disposed within said outer region, and

the second part comprises:
second waveguide cores, each having a same second height; and
one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures,

shaping the deformable support such that the inner region and the outer region are each planar and structurally contiguous and the inner region is recessed with respect to the outer region, and
bringing together the first part and the second part such that the second waveguide cores respectively contact the first waveguide cores and the one or more second alignment structures respectively receive, at least partly, the one or more first alignment structures.

15. The method of claim 14 , wherein shaping the deformable support is carried out using a pre-formed vacuum chuck with a recess vis-à-vis the inner region, so as to obtain the inner region recessed with respect to the outer region.

16. The method of claim 14 , wherein providing the first part and the second part of the chip packaging comprises fabricating the core polymer layer by depositing the core polymer layer onto the support and curing the core polymer layer.

17. The method of claim 14 , wherein the method further comprises, prior to providing said first part and said second part, fabricating the transversally structured core polymer layer by patterning said first waveguide cores and said one or more first alignment structures, during a same patterning process step.

18. A method for passively aligning two parts of a chip packaging, the method comprising:
providing a first part and a second part of a chip packaging, wherein:
the first part comprises:
a support; and
a core polymer layer extending over an inner region and an outer region of the support, the core polymer layer transversally structured so as to exhibit distinct residual portions, each having a same first height, which corresponds to a thickness of the core polymer layer, the residual portions comprising:
first waveguide cores disposed within said inner region; and
one or more first alignment structures disposed within said outer region,

the second part comprises:
second waveguide cores, each having a same second height; and
one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures,

and wherein, the first part is structured such that
said inner region is recessed with respect to the outer region, to enable
the second waveguide cores to contact the first waveguide cores and
the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures, to enable a passive alignment of the two parts,

bringing together the first part and the second part such that
the inner region and the outer region are each planar and structurally contiguous,
the second waveguide cores respectively contact the first waveguide cores and
the one or more second alignment structures respectively receive, at least partly, the one or more first alignment structures.

Assignees

• IBM

Inventors

• Dangel Roger F
• Jubin Daniel S
• La Porta Antonio
• Offrein Bert J

Classifications

• G02B6/1221

  made from organic materials · CPC title

• G02B2006/12147

  Coupler · CPC title

• G02B6/4257

  having a supporting carrier or a mounting substrate or a mounting plate (G02B6/3648 takes precedence) · CPC title

• G02B6/4228 Primary

  Passive alignment, i.e. without a detection of the degree of coupling or the position of the elements (G02B6/4234 takes precedence) · CPC title

• H10P72/78

  using vacuum or suction, e.g. Bernoulli chucks · CPC title