Apparatus and methods power amplifier biasing

Patent metadata

Field	Value
Publication number	US-9667203-B2
Application number	US-201514825053-A
Country	US
Kind code	B2
Filing date	Aug 12, 2015
Priority date	May 13, 2011
Publication date	May 30, 2017
Grant date	May 30, 2017

Abstract

Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

First claim

What is claimed is:

1. A mobile device comprising:
a transceiver configured to generate a radio frequency signal and an enable signal having an enabled state and a disabled state;
a power amplifier configured to amplify the radio frequency signal; and
a bias circuit configured to receive the enable signal and to generate a bias current that biases the power amplifier, the bias circuit configured to control a magnitude of the bias current based on the enable signal and to provide a transient boost to the magnitude of the bias current when the enable signal is transitioned from the disabled state to the enabled state to compensate for a variation in gain of the power amplifier from thermal effects, the bias circuit including a gain correction circuit having an input that receives the enable signal and an output that generates a correction current, a first bipolar transistor having an emitter electrically connected to the output of the correction circuit, and a second bipolar transistor having a base electrically connected to a base of the first bipolar transistor and an emitter configured to generate the bias current.

2. The mobile device of claim 1 wherein the gain correction circuit includes a resistor-capacitor network, the bias circuit configured to control a duration of the transient boost to the magnitude of the bias current based on a resistor-capacitor time constant of the resistor-capacitor network.

3. The mobile device of claim 2 wherein the resistor-capacitor network includes an input that receives the enable signal and an output that generates a control current, the resistor-capacitor network including a first resistor and a first capacitor electrically connected in series between the input of the resistor-capacitor network and the output of the RC network.

4. The mobile device of claim 3 wherein the resistor-capacitor network further includes a second resistor having a first end electrically connected to the input of the resistor-capacitor network and a second end electrically connected to the output of the resistor-capacitor network.

5. The mobile device of claim 4 wherein the second resistor has a resistance ranging between about 10 kΩ and about 100 kΩ.

6. The mobile device of claim 2 wherein the resistor-capacitor network includes an input that receives the enable signal and an output that generates a control current, the bias circuit further including a current amplifier including an input that receives the control current and an output that generates the correction current.

7. The mobile device of claim 6 wherein the current amplifier includes a current mirror configured to generate the correction current by mirroring the control current.

8. The mobile device of claim 1 wherein the second bipolar transistor further includes a collector electrically connected to a battery voltage.

9. The mobile device of claim 1 wherein the bias circuit further includes a biasing resistor including a first end electrically connected to the input of the resistor-capacitor network and a second end electrically connected to the emitter of the first bipolar transistor.

10. The mobile device of claim 1 wherein the bias circuit further includes a biasing resistor including a first end electrically connected to the input of the resistor-capacitor network and a second end electrically connected to a collector and base of the first bipolar transistor.

11. The mobile device of claim 1 wherein the bias circuit further includes a third bipolar transistor having an emitter electrically connected to a power low voltage and a base and a collector electrically connected to the emitter of the first bipolar transistor.

12. The mobile device of claim 1 wherein the power amplifier includes a bipolar transistor having a base that receives the bias current.

13. A method of power amplifier biasing in a mobile device, the method comprising:
generating a radio frequency signal and an enable signal using a transceiver;
amplifying the radio frequency signal using a power amplifier;
biasing the power amplifier with a bias current from a bias circuit;
generating a correction current based on the enable signal using a gain correction circuit of the bias circuit;
providing the correction current to an emitter of a first bipolar transistor of the bias circuit;
generating the bias circuit at an emitter of a second bipolar transistor of the bias circuit, the second bipolar transistor having a base electrically connected to a base of the first bipolar transistor;
transitioning the enable signal from a disabled state to an enabled state; and
using the bias circuit to provide a transient boost to a magnitude of the bias current in response to the transition to compensate for a variation in gain of the power amplifier from thermal effects.

14. The method of claim 13 wherein using the bias circuit to provide the transient boost to the magnitude of the bias current includes controlling a duration of the transient boost based on a resistor-capacitor time constant of a resistor-capacitor network of the gain correction circuit.

15. A power amplifier system comprising:
a power amplifier configured to amplify a radio frequency signal, the power amplifier including a bias input that receives a bias current; and
a bias circuit configured to receive an enable signal having an enabled state and a disabled state, the bias circuit configured to control a magnitude of the bias current based on the enable signal and to provide a transient boost to the magnitude of the bias current when the enable signal is transitioned from the disabled state to the enabled state to compensate for a variation in gain of the power amplifier from thermal effects, the bias circuit including a gain correction circuit having an input that receives the enable signal and an output that generates a correction current, a first bipolar transistor having an emitter electrically connected to the output of the correction circuit, and a second bipolar transistor having a base electrically connected to a base of the first bipolar transistor and an emitter configured to generate the bias current.

16. The power amplifier system of claim 15 wherein the gain correction circuit includes a resistor-capacitor network, the bias circuit configured to control a duration of the transient boost to the magnitude of the bias current based on a resistor-capacitor time constant of the resistor-capacitor network.

17. The power amplifier system of claim 16 wherein the resistor-capacitor network includes an input that receives the enable signal and an output that generates a control current, the resistor-capacitor network including a first resistor and a first capacitor electrically connected in series between the input of the resistor-capacitor network and the output of the resistor-capacitor network.

18. The power amplifier system of claim 17 wherein the resistor-capacitor network further includes a second resistor having a first end electrically connected to the input of the resistor-capacitor network and a second end electrically connected to the output of the resistor-capacitor network.

19. The power amplifier system of claim 15 wherein the resistor-capacitor network includes an input that receives the enable signal and an output that generates a control current, the bias circuit further including a current mirror configured to generate the correction current by mirroring the control current.

20. The power amplifier system of claim 15 wherein the bias circuit further includes a third bipolar transis

Assignees

• Skyworks Solutions Inc

Inventors

• Li Ping
• Dicarlo Paul T

Classifications

• H03F2200/336

  A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit · CPC title

• H03F1/0205

  in transistor amplifiers · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03F2200/18

  the bias of the gate of a FET being controlled by a control signal · CPC title

• H04B1/3827

  Portable transceivers · CPC title