Method for creating a slot-line on a multilayer substrate and multilayer printed circuit comprising at least one slot-line realized according to said method and used as an isolating slot or antenna

Patent metadata

Field	Value
Publication number	US-9660350-B2
Application number	US-201314400382-A
Country	US
Kind code	B2
Filing date	May 6, 2013
Priority date	May 14, 2012
Publication date	May 23, 2017
Grant date	May 23, 2017

Abstract

The present invention relates to a method for realizing a short-circuited slot-line on a multilayer substrate comprising at least a first conductive layer, a dielectric layer and a second conductive layer, the method comprising the following steps:
etching in the first conductive layer a slot-line having an electrical length L, etching in the first conductive layer, around the slot-line, a first portion of a first band having an electrical length L 1 ≦L, etching in the first conductive layer, around the slot-line, a second portion of said first band, having an electrical length L 2 ≦L, etching in the second conductive layer, a second band in the form of a loop having an electrical length L 3, one end of the second band being connected to the first part of the first band and the other end of the second band being connected to the second part of the first band so as to form a conductive loop.

The method is used notably to realize isolating slot-lines and slot-antennae.

First claim

The invention claimed is:

1. Method for realizing a slot antenna in a multilayer substrate of a printed circuit comprising at least a first conductive layer, a dielectric layer and a second conductive layer, the method comprising:
etching in the edge of the first conductive layer a short-circuited slot-line having an electrical length L,
etching in the first conductive layer a slot surrounding the slot-line and an opening at the short-circuited part of the slot-line so as to realize, a first portion of a first conductive band having an electrical length L 1 ≦L
and a second portion of said first conductive band having an electrical length L 2 ≦L,
etching in the second conductive layer, of a second conductive band in the form of a loop having an electrical length L 3 ,
one end of the second conductive band being connected to the first portion of the first conductive band and the other end of the second conductive band being connected to the second portion of the first conductive band so as to form a conductive loop
wherein the sum of the electrical lengths L 3 +L 1 +L 2 is substantially equal to 180°.

2. Method according to claim 1 , wherein the slot-line is a line of electrical length L<90°.

3. Method according to claim 2 , wherein the slot-line has an electrical length L=45°.

4. Method according to claim 1 , wherein the electrical lengths L 1 and L 2 of the first and second portions of the first conductive band are identical.

5. Method according to claim 4 , wherein the electrical lengths of the first and second portions of the first conductive band are equal to 45°.

6. Method according to claim 1 , wherein the electrical length L 3 of the second conductive band is substantially equal to the sum of the electrical lengths L 1 and L 2 of the first and second portions of the first conductive band.

7. Multilayer printed circuit comprising at least one slot-line realized according to claim 1 .

8. A slot antenna, comprising
a multilayer substrate including at least a first conductive layer, a dielectric layer and a second conductive layer:
a short-circuited slot-line having an electrical length L, etched in the edge of the first conductive layer,
a first portion of a first conductive band having an electrical length L 1 ≦L and a second portion of said first conductive band having an electrical length L 2 ≦L, etched in the first conductive layer a slot surrounding the slot-line and an opening at the short circuit part of the slot-line,
a second conductive band in the form of a loop having an electrical length L 3 , etched in the second conductive layer,
one end of the second conductive band being connected to the first portion of the first conductive band and the other end of the second conductive band being connected to the second portion of the first conductive band so as to form a conductive loop,
wherein the sum of the electrical lengths L 3 +L 1 +L 2 is substantially equal to 180°.

9. The slot antenna according to claim 8 , wherein the slot-line is a line of electrical length L<90°.

10. The slot antenna according to claim 8 , wherein that the slot-line has an electrical length L=45°.

11. The slot antenna according to claim 8 , wherein the electrical lengths L 1 and L 2 of the first and second portions of the first conductive band are identical.

12. The slot antenna according to claim 8 , wherein the electrical lengths of the first and second portions of the first conductive band are equal to 45°.

13. The slot antenna according to claim 8 , wherein the electrical length L 3 of the second conductive band is substantially equal to the sum of the electrical lengths L 1 and L 2 of the first and second portions of the first conductive band.

14. The slot antenna according to claim 8 , wherein the slot-line is an isolating slot.

15. The slot antenna according to claim 8 , wherein the slot-line extending on the side opposite the feed side by a slot-line terminating in an open circuit.

16. Terminal incorporating at least a slot antenna according to claim 8 .

Assignees

• Thomson Licensing

Inventors

• Lo Hine Tong Dominique
• Minard Philippe
• Robert Jean-Luc

Classifications

• H01Q1/38 Primary

  formed by a conductive layer on an insulating support {(patch antennas H01Q9/0407; microstrip dipole antennas H01Q9/065; microstrip slot antennas H01Q13/106; transmission line microstrip antennas H01Q13/206; manufacturing reflecting surfaces using insulating material for supporting the reflecting surface  H01Q15/142)} · CPC title

• H01Q1/521

  reducing the coupling between adjacent antennas · CPC title

• H05K1/0298

  Multilayer circuits · CPC title

• H05K3/22

  Secondary treatment of printed circuits {(H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107)} · CPC title

• H01Q21/28 Primary

  Combinations of substantially independent non-interacting antenna units or systems {(multiple beam H01Q25/00)} · CPC title