Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
US9659877B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9659877-B2 |
| Application number | US-201313967547-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 15, 2013 |
| Priority date | May 12, 2006 |
| Publication date | May 23, 2017 |
| Grant date | May 23, 2017 |
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One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in such that a circuit part to be shielded is arranged within the shielding elements. Since at least one partial section of the shielding elements includes a semiconductor material, a shielding device can be realized completely and cost-effectively in an integrated circuit.
Opening claim text (preview).
What is claimed is: 1. An integrated circuit comprising: a shielding base element comprising a semiconductor substrate having a first dopant concentration; a semiconductor layer formed on a surface of the semiconductor substrate, the semiconductor layer having a second dopant concentration less than the first dopant concentration; a doping well formed in the semiconductor layer, the doping well having a third dopant concentration greater than the second dopant concentration; a shielding cover element comprising a plurality of spaced apart metal elements; a circuit in the doping well; and a shielding lateral element electrically coupling the base to the cover element, the shielding lateral element including: a lower lateral shielding element comprising a continuous trench extending through the doping well and the semiconductor layer to the semiconductor substrate and forming a closed ring about the circuit in the doping well, the continuous trench filled with an electrically conductive material; and an upper lateral shielding element including vias and metal segments disposed in metallization layers above the doping well and which connect the cover shielding element to the lower lateral shielding element. 2. The integrated circuit of claim 1 , wherein the semiconductor substrate has a resistivity value of less than 15 mohm-cm. 3. The integrated circuit of claim 1 , wherein the shielding cover element and the shielding lateral element form a Faraday cage, and wherein the shielding lateral element and the shielding base element provide a lower portion of the Faraday cage and wherein the shielding cover element provides an upper portion of the Faraday cage. 4. The integrated circuit of claim 1 , further comprising: a rear side metallization contacting a surface of the shielding base element, the surface facing away from the circuit. 5. A shielding device for shielding from electromagnetic radiation, comprising: a shielding base element comprising a semiconductor substrate having a first dopant concentration; a semiconductor layer formed on a surface of the semiconductor substrate, the semiconductor layer having a second dopant concentration less than the first dopant concentration; a doping well formed in the semiconductor layer, the doping well having a third dopant concentration greater than the second dopant concentration; a shielding cover element comprising a plurality of spaced apart metal structures; and a shielding lateral element for electrically connecting the base element to the cover element, the shielding lateral element including: a lower lateral shielding element comprising a continuous trench extending through the doping well and the semiconductor layer to the semiconductor substrate and forming a closed ring about a circuit part to be shielded, wherein the continuous trench is filled with an electrically conductive material; and an upper lateral shielding element including vias and metal segments disposed in metallization layers above the doping well and which connect the cover shielding element to the lower lateral shielding element. 6. The shielding device of claim 5 , wherein the circuit part to be shielded is formed in the doping well. 7. The shielding device of claim 5 , wherein the semiconductor substrate has a resistivity value of less than 15 mohm-cm. 8. The shielding device of claim 5 , wherein the shielding cover element is formed in a wiring level. 9. The shielding device of claim 5 , wherein the lower lateral shielding element has a multiplicity of sinker contact structures formed in the semiconductor substrate, the semiconductor layer, and the doping well. 10. The shielding device of claim 9 , wherein the sinker contact structures are arranged in one line around the circuit part. 11. The shielding device of claim 9 , wherein the sinker contact structures are arranged in a plurality of lines around the circuit part. 12. The shielding device of claim 11 , wherein the plurality of lines of sinker contact structures are arranged offset with respect to one another. 13. The shielding device of claim 5 , wherein the semiconductor layer is an epitaxial semiconductor layer. 14. The shielding device of claim 5 , wherein the semiconductor substrate has a rear side metallization at least in the region of the shielding base element. 15. A shielding device for shielding from electromagnetic radiation, comprising: a shielding base element comprising a semiconductor substrate having a first dopant concentration; a semiconductor layer formed on a surface of the semiconductor substrate, the semiconductor layer having a second dopant concentration less than the first dopant concentration; a doping well formed in the semiconductor layer, the doping well having a third dopant concentration greater than the second dopant concentration; a shielding cover element comprising a plurality of spaced apart metal elements; and a shielding lateral element for electrically connecting the base element to the cover element in such a way to form a Faraday cage, wherein a circuit part to be shielded is formed in the doping well and is arranged within the Faraday cage, wherein the shielding lateral element includes: a lower lateral shielding element comprising a continuous trench extending through the doping well and the semiconductor layer to the semiconductor substrate and forming a closed ring the circuit in the doping well, the continuous trench filled with an electrically conductive material; and an upper lateral shielding element including vias and metal segments disposed in metallization layers above the doping well and which connect the cover shielding element to the lower lateral shielding element. 16. The integrated circuit of claim 1 , wherein the metal elements of the plurality of mental elements of the shielding cover element are spaced from one another by a distance not greater than one-tenth the wavelength of electromagnetic radiation to be shielded by the shielding cover element.
protecting against electrostatic charges or discharges, e.g. Faraday shields (integrated devices comprising arrangements for electrical protection H10D89/60) · CPC title
Shielding layers · CPC title
protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title
Electricity · mapped topic
Electricity · mapped topic
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