Device blanking

Patent metadata

Field	Value
Publication number	US-9659178-B1
Application number	US-201414183118-A
Country	US
Kind code	B1
Filing date	Feb 18, 2014
Priority date	Oct 22, 2013
Publication date	May 23, 2017
Grant date	May 23, 2017

Abstract

A method and apparatus is disclosed for protecting electronic devices from security breaches (e.g., in the form of DPA attacks) by managing input/output (I/O) pin states. The technique is particularly useful in financial applications in which data security related operations, such as those involving cryptography, are performed by payment card readers, and the power supplied to drive the operations are measured and analyzed by attackers to extract sensitive information. The technique prevents any external device from measuring the operation power by disabling the I/O pins. The I/O pins are set to a logic low at any given time a data security related operation is performed. As a result, no communication with the external environment is possible during the data security operation, and external power measurements by DPAs are prevented.

First claim

What is claimed is:

1. A method of managing pin states in a card reader, comprising:
in the card reader, detecting initialization of a cryptographic operation for processing payment data received, by the card reader, from a payment card to facilitate a payment transaction;
applying a blanking mode to prevent reception of communications from any device external to the card reader during the cryptographic operation by setting an input/output (I/O) terminal of the card reader to an output operating state; and
deactivating the blanking mode by restoring the I/O terminal of the card reader to an input operating state in response to a completion of the cryptographic operation, the deactivating enabling the card reader to transmit the payment data to a merchant device to complete the payment transaction.

2. The method of claim 1 , wherein setting the terminal of the card reader to the output operating state comprises:
changing a logic state of the input/output (I/O) terminal of the card reader to a predetermined logic level to disable communication through the I/O terminal.

3. The method of claim 1 , wherein restoring the terminal of the card reader to the input operating state comprises:
restoring a prior logic state of the I/O terminal of the card reader to restore an ability to communicate through the I/O terminal.

4. The method of claim 1 , wherein the cryptographic operation comprises at least one of:
generating a cryptographic hash from the payment data;
verifying the cryptographic hash associated with the payment data; or
encrypting the cryptographic hash associated with the payment data.

5. An apparatus comprising:
a plurality of input/output (I/O) terminals for communicating with a device that is external to the apparatus;
a processor, coupled to the I/O terminals to receive input data, and configured to perform a data security operation on the received input data; and
an I/O controller, coupled to the processor to receive a signal indicative of the data security operation, and configured to respond to the signal by setting a state of the plurality of I/O terminals to an output operating state so as to prevent reception of communications from an environment external to the apparatus through the plurality of I/O terminals.

6. The apparatus of claim 5 , wherein the I/O controller sets the state of the plurality of I/O terminals to a predetermined logic level in response to the signal being asserted to indicate that the data security operation has been initialized.

7. The apparatus of claim 5 , wherein the I/O controller sets the state to a normal input operating state in response to the signal being de-asserted to indicate the data security operation is complete.

8. The apparatus of claim 5 , wherein the data security operation comprises a cryptographic operation.

9. The apparatus of claim 8 , wherein the cryptographic operation comprises at least one of:
generating a cryptographic hash;
verifying a cryptographic hash; or
encrypting a cryptographic hash.

10. A method comprising:
receiving a signal indicative that a data security operation is about to be performed within an electronic device;
in response to receiving the signal,
setting a terminal of the electronic device to an output operating state to prevent reception of communications from an environment external to the electronic device through the terminal; and

in response to completion of the data security operation,
restoring the terminal of the electronic device to an input operating state.

11. The method of claim 10 , wherein setting the terminal of the electronic device to the output operating state includes setting the terminal to a logic low state in response to the signal being asserted to indicate the data security operation has been initialized.

12. The method of claim 10 , wherein the terminal is set to the input operating state in response to the signal being negative to indicate the data security operation is complete, the input operating state restoring an ability to communicate with the environment external to the electronic device through the terminal.

13. The method of claim 11 , wherein the terminal is an input terminal and wherein the logic low state results in the input terminal being turned into an output terminal.

14. The method of claim 10 , wherein the terminal comprises a solder ball of a ball grid array.

15. The method of claim 10 , wherein the data security operation comprises a cryptographic operation.

16. The method of claim 15 , wherein the cryptographic operation comprises at least one of:
generating a cryptographic hash;
verifying a cryptographic hash; or
encrypting a cryptographic hash.

17. A computer-readable medium storing instructions for execution by a processor of a device to perform a method of managing an input/output (I/O) pin of the device, comprising:
instructions for receiving a request to perform a cryptographic operation at the device;
instructions for disabling communication with an external environment through the I/O pin during the cryptographic operation by setting the I/O pin to an output operating state in response to receiving the request; and
instructions for enabling communication with the external environment through the I/O pin after completion of the cryptographic operation by restoring the I/O in to an input operating state.

18. The computer-readable medium of claim 17 , wherein the instructions for disabling communication comprise instructions for driving the I/O pin to a logic low to prevent the device from receiving or transmitting any signal from or to the external environment.

19. The computer-readable medium of claim 17 , wherein the cryptographic operation comprises at least one of:
generating a cryptographic hash;
verifying a cryptographic hash; or
encrypting a cryptographic hash.

Assignees

• Square Inc

Inventors

• Wade Jeremy

Classifications

• G06Q20/4012 Primary

  Verifying personal identification numbers [PIN] · CPC title

• G06F21/60 Primary

  Protecting data · CPC title

• G06F21/755

  with measures against power attack · CPC title

• G07F7/1016

  Devices or methods for securing the PIN and other transaction-data, e.g. by encryption (arrangements for secret communication, see H04L9/00) · CPC title

• G07F7/0873

  Details of the card reader · CPC title