System and method for software test analysis
US-2024419581-A1 · Dec 19, 2024 · US
US9658947B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9658947-B2 |
| Application number | US-201313769028-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 15, 2013 |
| Priority date | Feb 17, 2012 |
| Publication date | May 23, 2017 |
| Grant date | May 23, 2017 |
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Ranking of fault-test pairs is performed using first and second multitudes of waveform statistics. The first multitude of waveform statistics includes first value-change information regarding variations in logics HIGH and LOW for each bit of each reference output resulting from a test run of the design code. The second multitude of waveform statistics includes second value-change information regarding variations in logics HIGH and LOW for each bit of each faulty output resulting from a test run of the design code injected with a fault. Relative differences between the first and second multitudes of waveform statistics for each bit of each faulty output with respect to the corresponding reference output are determined. A waveform difference based on the relative differences for each signal of each faulty output is determined. A ranking result of fault-test pairs is determined according to the waveform differences of the faulty outputs.
Opening claim text (preview).
What is claimed is: 1. A computer-implemented method of ranking fault-test pairs in a mutation-based test programs evaluation system wherein the test programs are used to verify a design of an integrated circuit, the method comprising: obtaining, via the computer, a first plurality of waveform statistics associated with the design of the integrated circuit, wherein each of the first plurality of waveform statistics comprises first value-change information regarding variations in logic HIGH and logic LOW for each bit of each reference output resulting from a test run of the design of the integrated circuit; obtaining, via the computer, a second plurality of waveform statistics associated with the design of the integrated circuit, wherein each of the second plurality of waveform statistics comprises second value-change information regarding variations in logic HIGH and logic LOW for each bit of each faulty output resulting from a test run of the design of the integrated circuit injected with a fault; obtaining, via the computer, relative differences between the first plurality of waveform statistics and the second plurality of waveform statistics for each bit of each faulty output with respect to the corresponding reference output; obtaining, via the computer, waveform differences in response to the relative differences for each signal of each faulty output; and determining, via the computer, a ranking of fault-test pairs in response to the waveform differences of the faulty outputs. 2. The computer-implemented method as claimed in claim 1 , wherein the first value-change information comprises a first value-change count representing a number of value changes for each bit of each reference output, and the second value-change information comprises a second value-change count representing a number of value changes for each bit of each faulty output. 3. The computer-implemented method as claimed in claim 2 , wherein the first value-change information further comprises a first mean and a first standard deviation of durations of logic HIGH and logic LOW for each bit of each reference output, and the second value-change information further comprises a second mean and a second standard deviation of durations of logic HIGH and logic LOW for each bit of each faulty output. 4. The computer-implemented method as claimed in claim 3 , wherein the first value-change information further comprises a tempo list and a first tempo occurrence ratio of durations of logic HIGH and logic LOW for each bit of each reference output, and the second value-change information further comprises a second tempo occurrence ratio of durations of logic HIGH and logic LOW corresponding to the tempo list of the first value-change information for each bit of each faulty output. 5. The computer-implemented method as claimed in claim 4 , wherein the step of obtaining the relative differences between the first plurality of waveform statistics and the second plurality of waveform statistics for each bit of each faulty output with respect to the corresponding reference output further comprises: obtaining, via the computer, a relative difference in the value-change count according to the first and second value-change counts for each bit in the faulty output with respect to the corresponding bit in the reference output; obtaining, via the computer, a relative difference in the mean according to the first and second means of durations of logic HIGH and logic LOW for each bit in the faulty output with respect to the corresponding bit in the reference output; obtaining, via the computer, a relative difference in the standard deviation according to the first and second standard deviations of durations of logic HIGH and logic LOW for each bit in the faulty output with respect to the corresponding bit in the reference output; and obtaining, via the computer, a relative difference in the tempo occurrence ratio according to the first and second tempo occurrence ratios for each bit in the faulty output with respect to the corresponding bit in the reference output. 6. The computer-implemented method as claimed in claim 5 , wherein the relative difference in the value-change count is VC ( s ) - VC ( r ) VC ( r ) , the relative difference in the mean is M ( s ) - M ( r ) M ( r ) , the relative difference in the standard deviation is SD ( s ) - SD ( r ) SD ( r ) , and the relative difference in the tempo occurrence ratio is T ( s , r ) - T ( r )
for test results analysis · CPC title
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