Microelectromechanical systems (MEMS) devices at different pressures

Patent metadata

Field	Value
Publication number	US-9656857-B2
Application number	US-201414557513-A
Country	US
Kind code	B2
Filing date	Dec 2, 2014
Priority date	Nov 7, 2014
Publication date	May 23, 2017
Grant date	May 23, 2017

Abstract

Some embodiments relate to multiple MEMS devices that are integrated together on a single substrate. A device substrate comprising first and second micro-electro mechanical system (MEMS) devices is bonded to a capping structure. The capping structure comprises a first cavity arranged over the first MEMS device and a second cavity arranged over the second MEMS device. The first cavity is filled with a first gas at a first gas pressure. The second cavity is filled with a second gas at a second gas pressure, which is different from the first gas pressure. A recess is arranged within a lower surface of the capping structure. The recess abuts the second cavity. A vent is arranged within the capping structure. The vent extends from a top of the recess to the upper surface of the capping structure. A lid is arranged within the vent and configured to seal the second cavity.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a device substrate comprising first and second micro-electro mechanical system (MEMS) devices;
a capping structure bonded to the device substrate, the capping structure comprising a first cavity arranged over the first MEMS device and a second cavity arranged over the second MEMS device, wherein the first cavity is at a first gas pressure, and wherein the second cavity is at a second gas pressure, which is different from the first gas pressure;
a recess arranged within a lower surface of the capping structure, which abuts the second cavity and which extends from the lower surface of the capping structure to a top surface of the recess which is vertically spaced between the lower surface and an upper surface of the capping structure;
a vent arranged between vent sidewalls of the capping structure, wherein the vent sidewalls are coupled to the top surface of the recess, wherein the vent extends to the upper surface of the capping structure, and wherein the vent is narrower than the recess; and
a lid arranged within the vent and configured to seal the second cavity.

2. The semiconductor device of claim 1 , wherein the lid is arranged over a first portion of the upper surface of the capping structure in a vicinity of the vent, and wherein the lid exposes a second portion of the upper surface of the capping structure.

3. The semiconductor device of claim 1 , wherein a bond between the capping structure and the device substrate comprises:
a first hermetic seal, which surrounds the first cavity at an interface between a second lower surface of the capping structure and an upper surface of the device substrate, wherein the first hermetic seal prevents gas from diffusing from the first cavity; and
a second hermetic seal, which surrounds the second cavity at a second interface between the second lower surface of the capping structure and the upper surface of the device substrate, wherein the second hermetic seal prevents gas from diffusing from the second cavity.

4. The semiconductor device of claim 3 , wherein the first or second hermetic seal is formed from bonding materials including a semiconductor material and a metal material, which abut one another.

5. The semiconductor device of claim 1 , wherein the device substrate further comprises:
a processed substrate comprising at least one conductive layer, and
a MEMS substrate comprising the first and second MEMS devices, the MEMS substrate bonded to the processed substrate, wherein the first or second MEMS device are electrically connected to the at least one conductive layer.

6. The semiconductor device of claim 1 ,
wherein the capping structure comprises a conductive pillar that extends from a second lower surface of the capping structure, through the capping structure, to the upper surface of the capping structure; and
wherein the conductive pillar is surrounded and isolated from a remainder of the capping structure by a trench, which is filled with a dielectric material.

7. The semiconductor device of claim 1 , wherein the first and second cavities extend into an upper surface of the device substrate.

8. The semiconductor device of claim 1 , wherein the recess contacts recess sidewalls of the capping structure consisting of a first material, and wherein the vent contacts the vent sidewalls of the capping structure consisting of the first material.

9. A semiconductor device, comprising:
a device substrate comprising first and second micro-electro mechanical system (MEMS) devices;
a capping structure arranged over the device substrate and comprising a first cavity arranged over the first MEMS device and a second cavity arranged over the second MEMS device, wherein the first cavity is at a first pressure, and wherein the second cavity is at a second pressure, which is different from the first pressure;
a vent extending from a location in communication with the second cavity to an upper surface of the capping structure facing away from the device substrate;
a lid arranged within the vent and protruding outward from the upper surface of the capping structure; and
a silicon pillar extending from a lower surface of the capping structure, through the capping structure, to the upper surface of the capping structure;
a polysilicon layer laterally surrounding the silicon pillar and vertically extending from the lower surface of the capping structure to the upper surface of the capping structure; and
an isolating material laterally separating the silicon pillar from the capping structure.

10. The semiconductor device of claim 9 , further comprising:
a recess that is wider than the vent and that is arranged within a second lower surface of the capping structure, wherein the vent extends from the recess to the upper surface of the capping structure.

11. The semiconductor device of claim 9 , wherein the lid comprises silicon nitride, silicon oxy-nitride, oxide, photoresist, polyimide, amorphous carbon, polysilicon, amorphous silicon, or a metal.

12. The semiconductor device of claim 9 , wherein the isolating material laterally separates the polysilicon layer from the silicon pillar and from the capping structure.

13. The semiconductor device of claim 9 , wherein the device substrate comprises:
a semiconductor substrate having one or more transistor devices; and
a MEMs substrate separated from the semiconductor substrate by a dielectric structure comprising a plurality of metal interconnect layers.

14. A semiconductor device, comprising:
a device substrate comprising first and second micro-electro mechanical system (MEMS) devices;
a capping structure arranged over the device substrate and comprising a first cavity arranged over the first MEMS device and a second cavity arranged over the second MEMS device, wherein the first cavity is at a first pressure, and wherein the second cavity is at a second pressure, which is different from the first pressure;
a vent, extending from a location in communication with the second cavity to an upper surface of the capping structure facing away from the device substrate;
a lid arranged within the vent;
a pillar of capping structure material comprising pillar sidewalls that extend vertically from a lower surface of the capping structure to the upper surface of the capping structure; and
an isolating material surrounding the pillar sidewalls and vertically extending from the lower surface to the upper surface of the pillar sidewalls, and laterally separating the pillar from the capping structure.

15. The semiconductor device of claim 14 , further comprising:
a polysilicon layer laterally surrounding the pillar of capping structure material and vertically extending from the lower surface of the capping structure to the upper surface of the capping structure.

16. The semiconductor device of claim 15 , wherein the polysilicon layer separates a lower surface of the pillar of capping structure material from the device substrate.

17. The semiconductor device of claim 16 ,
wherein the polysilicon layer has a first lower surface underlying the pillar of capping structure material, which is below a lower surface of the isolating material; and
wherein the polysilicon layer has a second lower surface, laterally between the pillar of capping structure material and the capping structure, which is above the lower surface of the isolating material.

18. The semiconductor device of claim 14 , wherein the pillar of capping structure material is laterally offset from the vent.

19. The semiconduct

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Huang Hsin-Ting
• Chen Hsiang-Fu
• Tai Wen-Chuan
• Yu Shao-Chi
• Hung Chia-Ming
• Chang Allen Timothy
• Chou Bruce C S
• Lin Chin-Min

Classifications

• B81B2201/0242

  Gyroscopes · CPC title

• B81C2203/0145

  Hermetically sealing an opening in the lid · CPC title

• B81B2207/095

  through the lid · CPC title

• B81B7/02 Primary

  containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

• B81B2201/0235

  Accelerometers · CPC title