Electronic module

Patent metadata

Field	Value
Publication number	US-9655265-B2
Application number	US-201414287083-A
Country	US
Kind code	B2
Filing date	May 26, 2014
Priority date	May 26, 2014
Publication date	May 16, 2017
Grant date	May 16, 2017

Abstract

An electronic module is provided, comprising an electronic chip arranged in the electronic module and comprising an input terminal and an output terminal; a first current path electrically connected to the input terminal; a second current path electrically connected to the output terminal; and an insulation arranged between the first current path and the second current path, wherein the first current path and the second current path extend in the same direction and arranged in close proximity to each other.

First claim

What is claimed is:

1. An electronic module, comprising:
an electronic chip arranged in the electronic module and comprising an input terminal and an output terminal;
a first current path electrically connected to the input terminal;
a second current path electrically connected to the output terminal; and
an insulation arranged between the first current path and the second current path,
wherein the first current path and the second current path extend in the same direction and arranged in close proximity to each other;
wherein the insulator is formed by an insulating layer having a thickness of less than 500 micrometer;
wherein the first current path and the second current path each comprise a first portion which is connected to the electronic chip, and
wherein the first current path and the second current path each comprise a second portion which is connected to the insulation;
wherein at least one of the first current path and the second current path comprises a step between the first portion and the second portion; and
wherein a distance between the first portion of the first current path and the first portion of the second current path is larger than a distance between the second portion of the first current path and the second portion of the second current path.

2. The electronic module according to claim 1 , wherein the insulator is adapted to withstand a voltage of at least 100 V.

3. The electronic module according to claim 1 , wherein the insulator comprises at least one material out of the group consisting of:
silicon nitride;
polyimide;
fluorocarbon; and
fluoropolymer.

4. The electronic module according to claim 1 , wherein the electronic chip comprises a transistor and the first current path is connected to a first switched terminal of the transistor and the second current path is connected to a second switched terminal of the transistor.

5. The electronic module according to claim 1 , wherein the first current path and the second current path are soldered to the electronic chip.

6. The electronic module according to claim 1 , further comprising:
a heatsink thermally connected to at least one of the first current path and the second current path.

7. The electronic module according to claim 1 , further comprising an encapsulation encapsulating the electronic chip at least partially.

8. The electronic module according to claim 1 , wherein the insulator is arranged on a side portion of the first current path.

9. The electronic module according to claim 1 , wherein at least one of the first and second current paths is formed by a straight current path.

10. The electronic module according to claim 1 , wherein the electronic module comprises a plurality of electronic chips each electrically connected to the first current path and the second current path.

11. The electronic module according to claim 7 , wherein the electronic module further comprises a further electronic component arranged in the encapsulation.

12. The electronic module according to claim 7 , wherein the encapsulation comprises a contact hole.

13. The electronic module according to claim 7 , wherein the encapsulation comprises a fixing feature.

14. An electronic module, comprising:
a die arranged in the electronic module and comprising a first terminal and a second terminal;
a first current path electrically connected to the first terminal;
a second current path electrically connected to the second terminal and extending parallel to the first current path; and
an insulation arranged between the first current path and the second current path,
wherein a current in the first current paths flows in the opposite direction to a current flowing in the second current path;
wherein the insulator is formed by an insulating layer having a thickness of less than 500 micrometer;
wherein the first current path and the second current path each comprise a first portion which is connected to the die, and
wherein the first current path and the second current path each comprise a second portion which is connected to the insulation;
wherein at least one of the first current path and the second current path comprises a step between the first portion and the second portion; and
wherein a distance between the first portion of the first current path and the first portion of the second current path is larger than a distance between the second portion of the first current path and the second portion of the second current path.

Assignees

• Infineon Technologies Ag

Inventors

• Pon Tiam Meng
• Long Theng Chao

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W72/07552

  changes in structures or sizes · CPC title

• H10W72/07354

  changes in dispositions · CPC title

• H10W72/07336

  Soldering or alloying · CPC title