Wireless peripheral interconnect bus

US9655167B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9655167-B2
Application numberUS-201113242110-A
CountryUS
Kind codeB2
Filing dateSep 23, 2011
Priority dateMay 16, 2007
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wireless peripheral interconnect bus capable of providing a high rate data transfer between peripheral devices and a host bridge of a computing device over a wireless medium comprises a first wireless pair for transferring data between a first peripheral component and a second peripheral component, wherein the first wireless pair implements at least at a layered protocol; and a second wireless pair for transferring data between a second peripheral component and the first peripheral component, wherein the second wireless pair implements at least a layered protocol.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising: a first wireless transceiver, wherein: the apparatus implements a layered protocol; the layered protocol includes a transaction layer and a wireless adaptation layer; and the wireless adaptation layer is configured to function as a medium access controller (MAC) and establish wireless links between the first wireless transceiver and a second wireless transceiver by receiving transaction layer packets (TLPs) from the transaction layer and assembling the TLPs in a wireless peripheral interconnect adaptation packet (WPAP). 2. The apparatus of claim 1 , wherein: a first wireless receiver of the first wireless transceiver and a second wireless transmitter of the second wireless transceiver communicate over a first unidirectional wireless link; and a second wireless receiver of the second wireless transceiver and a first wireless transmitter of the first wireless transceiver communicate over a second unidirectional wireless link. 3. The apparatus of claim 1 , wherein: the WPAP comprises at least one of a data portion or a cyclic redundancy check (CRC) field; and the data portion includes a plurality of TLPs. 4. The apparatus of claim 3 , further comprising a processor, wherein the processor is configured to construct the WPAP by: saving each TLP together with an identifier of the TLP in the data portion of the WPAP; computing a CRC code for the TLPs saved in the data portion; and inserting the CRC code in the CRC field. 5. The apparatus of claim 3 , wherein: the layered protocol includes a wireless physical layer (WPHY); the WPHY constructs a WPHY frame, the WPHY frame comprises a plurality of symbols and a preamble; and each of the symbols comprises at least one WPAP. 6. The apparatus of claim 1 , wherein: the first wireless transceiver is coupled to at least a first peripheral component; the second wireless transceiver is coupled to at least a second peripheral component; and each of the first peripheral component and the second peripheral component comprises a peripheral component interconnect (PCI) Express (PCIe) endpoint, a legacy endpoint, or a PCIe switch. 7. The apparatus of claim 1 , wherein: the layered protocol includes a data link layer and a physical layer; and the data link layer, the physical layer, and the transaction layer are compliant with at least a PCIe bus. 8. The apparatus of claim 1 , wherein: the first wireless transceiver is coupled to at least a first peripheral component; and the first peripheral component comprises a switch configured to couple a plurality of peripheral interconnect endpoints. 9. An apparatus, comprising: a first peripheral component interconnect (PCI) Express (PCIe) component having a first wireless transceiver, wherein: the first PCIe component is coupled to a first peripheral component; and the apparatus implements a layered protocol including a wireless adaptation layer (WAL) and a transaction layer; the transaction layer, at the first wireless transceiver, is configured to receive data from the first peripheral component, assemble the data into one or more transaction layer packets (TLPs), and forward the TLPs to the WAL; and the WAL, at the first wireless transceiver, is configured to receive the TLPs from the transaction layer, and assemble the TLPs in one or more wireless peripheral interconnect adaptation packets (WPAPs). 10. The apparatus of claim 9 , wherein: the layered protocol includes a wireless physical layer (WPHY); the WAL, at the first wireless transceiver, is further configured to forward the WPAPs to the WPHY; and the WPHY, at the first wireless transceiver, is configured to receive the WPAPs, construct a WPHY frame including the WPAPs, and forward the WPHY frame to a second wireless transceiver. 11. The apparatus of claim 9 , wherein: the one or more WPAPs comprise at least one of a header field, a data portion, or a cyclic redundancy check (CRC) field; and assembling the TLPs comprises including the TLPs in the data portion of the one or more WPAPs. 12. The apparatus of claim 11 , wherein: the header field comprises at least one of a source address, a destination address, a lane ID, or a peripheral component ID. 13. The apparatus of claim 10 , wherein: the WPHY frame comprises at least a preamble or a plurality of data symbols, each of the plurality of data symbols including at least one WPAP. 14. The apparatus of claim 10 , further comprising a second PCIe component coupled to a second peripheral component and having the second wireless transceiver, wherein: the WPHY, at the second wireless transceiver, is configured to receive the WPHY frame, extract the WPAPs from WPHY frame, and forward the WPAPs to the WAL; the WAL, at the second wireless transceiver, is configured to extract the TLPs from the WPAPs, and forward the TLPs to the transaction layer; and the transaction layer, at the second wireless receiver, is configured to extract the data from the TLPs and forward the data to the second peripheral component. 15. The apparatus of claim 14 , wherein each of the first peripheral component and the second peripheral component comprises one of a peripheral component interconnect express (PCIe) endpoint, a legacy endpoint, or a PCIe switch. 16. A method for wireless communications by an apparatus, comprising: receiving transaction layer packets (TLPs) at a wireless adaptation layer of a first component of the apparatus from a first peripheral component coupled to the first component of the apparatus, wherein the TLPs are received from a transaction layer of the first component of the apparatus; and assembling the TLPs, at the wireless adaptation layer, in a wireless peripheral interconnect adaptation packet (WPAP). 17. The method of claim 16 , further comprising: forwarding the WPAPs to a wireless physical layer (WPHY) of the first component; constructing a WPHY frame including the WPAPs; and forwarding the PHY frame to a second component of the apparatus component of the apparatus coupled to a second peripheral component. 18. The method of claim 17 , wherein the each of the first peripheral component and the second peripheral component comprises a peripheral component interconnect (PCI) Express (PCIe) endpoint, a legacy endpoint, or a PCIe switch. 19. The apparatus of claim 1 , further comprising at least one antenna via which the first wireless transceiver establishes a wireless link with the second wireless transceiver, wherein the apparatus is configured as a computing device. 20. The apparatus of claim 9 , further comprising at least one antenna via which the first wireless transceiver establishes a wireless link with the second wireless transceiver, wherein the apparatus is configured as a computing device.

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Classifications

  • H04W99/00Primary

    Subject matter not provided for in other groups of this subclass · CPC title

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Frequently asked questions

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What does patent US9655167B2 cover?
A wireless peripheral interconnect bus capable of providing a high rate data transfer between peripheral devices and a host bridge of a computing device over a wireless medium comprises a first wireless pair for transferring data between a first peripheral component and a second peripheral component, wherein the first wireless pair implements at least at a layered protocol; and a second wireles…
Who is the assignee on this patent?
Tamir Tal, Rettig Daniel, Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H04W99/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).